Minutes of the Verilog-AMS call - 27 March 2008

Attendees:
Marq Kole, NXP
Dave Miller, Freescale
Martin O'Leary, Cadence
Boris Troyanovsky, Tiburon
Patrick O'Halloran, Tiburon
Dave Cronauer, Synopsys
Kevin Cameron, True Circuits
Jonathan David, Consultant

Chapter reviewed: Title to Chapter 4.

Title chapter:
   - Page V: Typos on the following names: Jim Barby (extra brackets at 
end), Kevin Cameron (True Circuits Corp), Paul Floyd (Mentor Graphics 
Inc), Peter Liebmann (Agilent)
   - Page V: Please add Xavier Bestel (Mentor Graphics) and David 
Cronauer (Synopsys)
   - Page V: Recommendation to left justify the names

Chapter 1, Verilog-AMS introduction
   - (section 1.1, page 1): Recommendation was to remove the figure 
specified in this section. Refers to 1364-1995 etc and the text is 
descriptive enough.

Chapter 2, Lexical conventions
   - none

Chapter 3, Data types
   - (section 3.4.2, page 30/31): It was decided to add apostrophe to 
the { operator when specifying from/exclude lists for string parameters 
to keep it consistent.
   - Add this change of including ` for concatenation operators as part 
of Annex H (list of changes).
   - (section 3.4.2, page 31/32): change gatetype to transistortype
   - (section 3.4.6, page 32): Yes apostrophe is required for the string 
parameter
   - (section 3.4.6, page 32): Remove extra brackets in the example - 
first statement under sign = ... -> sign = (type = "NPN") ? ...
   - (section 3.6.2.1, page 38): change multi-disciplinaries to multiple 
disciplines

Chapter 4, Expressions
   - (section 4.2.1.2, page 53): Treating of x/z as zero is wrong in the 
analog context. In fact as per section 7.3.2 x and z are not allowed in 
the analog context when assigning to an analog variable or branch. 
Please make reference to clause 7.3.2
   - (section 4.2.13, page 59): Confusion between array literal and 
concatenation (examples seem to refer to array literals rather than 
concat tho' both use the same operator).
     * AI on Martin O'Leary to send out the correct text.
     * The plan is to copy from digital LRM an example for concatenation.
     * Leave the last example with replication as is in that section. 
There should be a apostrophe - `2`{a,b} in that example.
     * Make a note on array literal (or a sub-clause) and use the first 
two examples in clause 4.2.13 as examples.
   - (section 4.3.2, pg 61): The mantis reference 1713 is for atan2 and 
not hypot. Define atan2(0,0) as zero.
   - (section 4.5.6, pg 67): Move syntax box 4-2 as part of clause 4.5 
and replace with description of ddx (similar to absdelay and others) for 
clause 4.5.6
   - (section 4.5.11, pg 74): Mathematical equations are not printing 
correctly and is clobbered with other text in the pdf.
   - (section 4.7.3, pg 88): arrayint to be changed to arrayadd and 
apostrophe needs to be added to the concatenation operator.

Next meeting: April 3rd, from Chapter 5 onwards. We will go back to new 
timings from the upcoming meeting (6:30am US Pacific). Full details will 
be sent along with the reminder notification.

cheers,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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