Marq Kole wrote: > > OK, I'll bite :-) > > Kevin, > > If I just consider the title of the Mantis item and actual contents of > the 3rd "2)" item in section 7.8.4 of Verilog-AMS LRM 2.3 Draft 3 then > I see a conflict, i.e.: > > Mantis item#2343: Connect module instances should be on lower side of > ports. > > 3rd "2)" item in section 7.8.4: The connect module for a port shall be > instantiated in the context of the ports upper connection. > > This means that the actual location of the connect module instance > will change with your proposal. As far as I can see this impacts in > two ways: > - it will create an extra level of hierarchy, and > - it will change to the actual discipline of the port on which the > connect module is operating. > > I've tried to make a drawing to show the location of the connect > module for the current LRM text and the Mantis #2343 proposal. > > 3rd "2)" item in section 7.8.4 Mantis item#2343 > > +-module1---------------------------+ > +-module1---------------------------+ > | | | > | > | | | > | > | +-module2-----+ | | +-module2-----+ > | > | | | +CM-+ | | | +CM-+ | > | > | | D---|d2a|-----------A | | > |d2a|---A-------------------A > | | | +---+ | | | +---+ | > | > | +-------------+ | | +-------------+ > | > | | | > | > +-----------------------------------+ > +-----------------------------------+ > > Please accept my apologies for my meagre ascii drawing skills -- I > hope this turns out readable after email transmission. > > With the change proposed in Mantis item 2343, as far as I can see the > actual port of the module 2 which is defined as digital by the module > writer turns analog after connect module insertion. After all, module > 2 will be the nearest parent of the driver process in case of a d2a. > > I would not expect a port to change discipline, even if it happens > after elaboration. What's your opinion? > The drawing is excellent. The ports of the connect module are not connected to the original ports, rather the drivers and receivers of the original net are disconnected and attached the ports of the connect module: neither the original ports nor the drivers/receivers change type - regardless of where the connect module is instantiated. Ports are best viewed as type-neutral interconnect in AMS. The reason disciplines are attached to ports is there is no syntactic hook for attaching them directly to drivers or receivers. The "digital" or "analog" aspect of a net is really an attribute of the drivers and receivers rather than the ports, expressing analog/digital behavior in a port type is pretty much redundant since it can be inferred from usage. Kev. > > Cheers, > Marq > > owner-verilog-ams@server.eda.org wrote on 21-04-2008 19:54:52: > > > Sri Chandra wrote: > > > Kevin, > > > > > > We can discuss this part of the next meeting on May 1st and if its an > > > easy fix without much impact for sure we can put it in the next > draft. > > > I am somehow worried that any fix with connect modules is not an easy > > > fix :) Hope you will be able to attend the meeting when this is > > > discussed. > > > > Not sure I'll be able to attend the May 1st meeting. > > > > The fix should not change how the connect modules actually connect and > > operate, just the hierarchical name of their instances. It's just > > preparatory work for power-supply connection and back-annotation > support. > > > > If anyone has objections to the proposal I can redo it if necessary, so > > feedback before the next meeting would be appreciated. > > > > Kev. > > > > -- > This message has been scanned for viruses and > dangerous content by *MailScanner* <http://www.mailscanner.info/>, and is > believed to be clean. > -- True Circuits Inc. - http://www.truecircuits.com Tel: (650) 949 3400 Ext 3415 -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Apr 21 17:11:28 2008
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