Re: Verilog-AMS Committee Meeting - 12 May 2008 (Monday)

From: Sri Chandra <sri.chandra_at_.....>
Date: Mon May 12 2008 - 11:02:59 PDT
Ok, i have just included this in the minutes, but I think Goeffrey's 
email is more detailed on this.

Marq suggested he will work on Annex H.

Regards,
Sri


Geoffrey.Coram wrote:
> I've added a bugnote to
>   http://www.eda-stds.org/mantis/view.php?id=2324
> that I believe proposes all the updates necessary
> 
> Also, I think Mantis 2323 needs to be re-opened; I've put
> specific notes in that one (it wasn't properly resolved
> in Draft 3).
> 
> As for "nmos" on pages 128ff:
> 
> a) change "nmos" to "nmos3" as shown here:
>   These lines could be written in Verilog-AMS as follows, assuming
>   that nmos3 is a behavioral module that contains the same equations
>   as the SPICE primitive.
> 
> b) change
>   paramset nch nmos; // default paramset
> to
>   paramset nch nmos3; // default paramset
> 
> c) delete
>   .level=3;
> from the list of specified parameter values
> 
> d) change "nmos" to "nmos3" in the paragraph below the example,
>    "... underlying module nmos3 would ..."
> 
> e) page 129: change
>   paramset nch nmos; // mismatch paramset
> to
>   paramset nch nmos3; // default paramset
> 
> f) page 130: change
>   paramset nch nmos; // default paramset
> to
>   paramset nch nmos3; // default paramset
> 
> and change
>   paramset nch nmos; // long-channel paramset
> go
>   paramset nch nmos3; // long-channel paramset
> 
> 
> Doing a "search" in the PDF, I found also on page 141
>   module nmos (d, g, s, b);
> which should be changed to
>   module nmosfet (d, g, s, b);
> 
> 
> -Geoffrey
> 
> 
> 
> Geoffrey.Coram wrote:
>>
>> Here's the list of things we may need to discuss in committee:
>>
>>
>> Page 27 (41 of 407):
>>   "it shall be an error to assign a numeric value to a parameter
>>   declared as string or to assign a string value to an integer
>>   or real parameter, whether that parameter was declared as integer
>>   or real or had its type derived from the type of the value of the
>>   constant expression."
>>
>> Much as I'd like the second point of that to be true (error to assign
>> a string value to an integer parameter), I believe 1364 Verilog treats
>> string literals as integers when assigning them to reg variables.
>>
>>
>> Page 61 (75 of 407):
>> ac_stim, white_noise, flicker_noise, noise_table were supposed to get
>> their own syntax item, because they are *not* analog filter functions.
>> See: http://www.eda-stds.org/mantis/view.php?id=2324
>>
>>
>> Page 128 (142 of 407):
>> The paramset examples use "nmos" which the text wants to be a
>> module identifier, but it's a keyword.
>>
>>
>> Page 145 (159 of 407):
>> fourth bullet: I suggested a rewrite of the second sentence to
>>   "However, parameter declaration statements shall not make out
>>   of module references (e.g., for setting default values)."
>>
>> I believe this restriction should also apply to array port
>> declarations, eg
>>   input in[0:top.width-1];
>> should be disallowed.
>>
>>
>> Page 243 (257 of 407):
>> Can we add an example that uses a 1800 keyword and VAMS-2.3?
>> Eg "logic" ?
>>
>>
>>
>> Lastly: can we get an index?
>>
>>
>> -Geoffrey
>>
> 

-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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Received on Mon May 12 11:03:52 2008

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