6.5-6.5.2 Ports

Hi,

The text of 6.5 is based on very old text and is not correct.

Some examples:

The title of 6.5.1 should be 'Port definition', not 'Port association'.

The list of what a port expression can be is not updated. 1364-2005 has:
"The port reference for each port in the list of ports at the top of
each module declaration can be one of the following:
- A simple identifier or escaped identifier
- A bit-select of a vector declared within the module
- A part-select of a vector declared within the module
- A concatenation of any of the above"

The sentence, "The two types of module port definitions cannot be mixed;
the ports of a particular module definition shall all be defined by
order or by name," is simply wrong. The requirement refers to port
connections, not to port definitions. In 1364-2005, it is in 12.3.6:
"The two types of module port connections shall not be mixed;
connections to the ports of a particular module instance shall be all by
order or all by name."

6.5 does not describe ANSI-style port declarations at all (12.3.4 in
1364-2005).

Regards,
Shalom

Shalom Bresticker
Intel Jerusalem LAD DA
+972 2 589-6582
+972 54 721-1033

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