Re: Minutes of the Verilog-AMS meeting: 10th July 2008

From: Sri Chandra <sri.chandra_at_.....>
Date: Tue Jul 15 2008 - 01:20:09 PDT
Shalom,

Very good point. So i guess the local references should be 7,9,10 and 11 
as I merged chapters 5/6 in LRM v2.3 (and possibly the author of chapter 
2 worked before this merger was done) as we could hardly distinguish the 
difference between the two. I guess the reference to 1364-2005 in that 
bullet point was added incorrectly which led to all the confusion.

Regards,

Bresticker, Shalom wrote:
> Note that 1364-2005 itself has a parallel subclause saying where the
> system tasks and functions are. Section 3.7.3 says,
> 
> "The $identifier system task/function can be defined in three places:
> - A standard set of $identifier system tasks and functions, as defined
> in Clause 17 and Clause 18.
> - Additional $identifier system tasks and functions defined using the
> PLI, as described in Clause 20.
> - Additional $identifier system tasks and functions defined by software
> implementations." 
> 
> I suspect the incorrect references point to Verilog-AMS 2.2.
> There Clause 8 is Mixed-signal and 8.11 is Supplementary driver access
> functions.
> Clause 10 there is System tasks and functions.
> Clause 12 is Using VPI routines.
> Clause 11 is Compiler directives.
> That seems to correspond almost perfectly to the erroneous references.
> 
> Regards,
> Shalom
> 
>> -----Original Message-----
>> From: Geoffrey.Coram [mailto:geoffrey.coram@analog.com] 
>> Sent: Monday, July 14, 2008 7:30 PM
>> To: Bresticker, Shalom
>> Cc: Sri Chandra; Verilog-AMS LRM Committee; Wilmore, Jim
>> Subject: Re: Minutes of the Verilog-AMS meeting: 10th July 2008
>>
>> I didn't know if 1364-2005 had other $identifiers not in the 
>> main "system tasks and functions" clause.
>>
>> But, I agree with you that the extra references should be cut 
>> from the LRM; we should create a mantis item to track down 
>> why these references were there (was there something in that Clause in
>> 1364-1995 or -2001?).  The whole set of references were added 
>> in some LRM 2.3 draft -- LRM 2.2 has only a reference to 
>> Section 10 of the V-AMS LRM, so clearly someone did some work 
>> to add these references ...
>>
>> -Geoffrey
>>
>>
>>
>>
>> Bresticker, Shalom wrote:
>>> But the references in question are in the dashed item referring to 
>>> 1364-2005, not internally to the V-AMS LRM. So the extra 
>> references to
>>> 1364-2005 are still wrong. Am I being dense?
>>>
>>> Shalom
>>>
>>>> -----Original Message-----
>>>> From: Geoffrey.Coram [mailto:geoffrey.coram@analog.com]
>>>> Sent: Monday, July 14, 2008 6:19 PM
>>>> To: Bresticker, Shalom
>>>> Cc: Sri Chandra; Verilog-AMS LRM Committee; Wilmore, Jim
>>>> Subject: Re: Minutes of the Verilog-AMS meeting: 10th July 2008
>>>>
>>>> It was probably my fault that this was listed as low-priority; it 
>>>> seemed like a lot of work to track down the original 
>> intent, and it 
>>>> didn't occur to me that copying the existing text to 
>> Mantis would be 
>>>> a better way to mark the issue for later attention than 
>> leaving it in 
>>>> the LRM.
>>>>
>>>> I had a vague sense that maybe there were $functions mentioned in 
>>>> scattered chapters, specific to the main topic of the chapter -- 
>>>> things like $param_given that is mentioned in 6.3.5 -- and 
>> wondered 
>>>> if there were any $functions that were not also described 
>> in Clause 
>>>> 9.  If an $identifier is defined outside the list of 
>> places in 2.8.3, 
>>>> is someone going to be upset?
>>>>
>>>> -Geoffrey
>>>>
>>>>
>>>>
>>>> Bresticker, Shalom wrote:
>>>>> Hi, Sri.
>>>>>
>>>>> The correct references are already there.
>>>>> The additional references are erroneous.
>>>>>
>>>>> Regardless, there is no point in leaving references that
>>>> are clearly
>>>>> wrong.
>>>>> If you are not going to change them, then delete them now,
>>>> and you can
>>>>> always add others later.
>>>>>
>>>>> If you had written 2+2=5 and discovered the error, you 
>> would either 
>>>>> correct it to 4 or delete it. You would not leave a
>>>> sentence that you
>>>>> know to be wrong. It is different than a sentence which is
>>>> partially
>>>>> correct and partially incorrect, where you might say that 
>> there is 
>>>>> some benefit in leaving it.
>>>>>
>>>>> Can you point to a single benefit from leaving the
>>>> incorrect references?
>>>>> Regards,
>>>>> Shalom
>>>>>
>>>>>> -----Original Message-----
>>>>>> From: Sri Chandra [mailto:sri.chandra@freescale.com]
>>>>>> Sent: Monday, July 14, 2008 6:09 AM
>>>>>> To: Bresticker, Shalom
>>>>>> Cc: Verilog-AMS LRM Committee; Wilmore, Jim
>>>>>> Subject: Re: Minutes of the Verilog-AMS meeting: 10th July 2008
>>>>>>
>>>>>> Shalom,
>>>>>>
>>>>>> Thanks for your response and clarifying the text on that.
>>>>>>
>>>>>> We had a bit of discussion on this item and we were not 
>> clear what 
>>>>>> the references are intended for, and what the correct references 
>>>>>> should be for both the system tasks and functions.
>>>>>> It was acknowledged during the meeting that the references
>>>> may be in
>>>>>> error (due to chapter
>>>>>> addition/deletions) or sections having been moved. 
>> However, it was 
>>>>>> felt in the discussions that it was probably a minor issue which 
>>>>>> might take more time to actually figure out the correct ones and 
>>>>>> leave them there.
>>>>>> May be not the best approach but since during the
>>>> discussions it was
>>>>>> felt as a minor item.
>>>>>>
>>>>>> I understand your concern, and greatly appreciate the
>>>> feedback that
>>>>>> we would like to incorporate in the LRM, and apologize
>>>> that you find
>>>>>> this particular decision ridiculous.
>>>>>> I will take another look at this particular issue that you have 
>>>>>> mentioned.
>>>>>>
>>>>>> Regards,
>>>>>> Sri
>>>>>>
>>>>>>
>>>>>>
>>>>>> Bresticker, Shalom wrote:
>>>>>>> Hi,
>>>>>>>
>>>>>>> Regarding the cross-references to IEEE Std 1364-2005 claues
>>>>>> for system
>>>>>>> tasks and functions and compiler directives, the internal
>>>>>> references
>>>>>>> appear immediately following the texts in question:
>>>>>>>
>>>>>>> The $identifier system task or function can be defined in
>>>>>> five places
>>>>>>> - A standard set of $identifier system tasks and functions,
>>>>>> as defined
>>>>>>> in Clause 8, Clause 10, Clause 17 and Clause 18 of IEEE std
>>>>>> 1364-2005
>>>>>>> Verilog HDL.
>>>>>>> - Additional $identifier system tasks and functions defined
>>>>>> using the
>>>>>>> PLI, as described in Clause 12 and Clause 20 of IEEE std
>>>> 1364-2005
>>>>>>> Verilog HDL.
>>>>>>> - Additional $identifier system tasks and functions defined
>>>>>> in Clause
>>>>>>> 4 and Clause 9 of this standard.
>>>>>>> - Additional $identifier system tasks and functions defined
>>>>>> using the
>>>>>>> VPI as described in Clause 11 and Clause 12 of this standard.
>>>>>>> - Additional $identifier system tasks and functions defined by 
>>>>>>> software implementations.
>>>>>>>
>>>>>>> and
>>>>>>>
>>>>>>> The `identifier compiler directive construct can be defined
>>>>>> in three
>>>>>>> places
>>>>>>> - A standard set of `identifier compiler directives defined
>>>>>> in Clause
>>>>>>> 11 and Clause 19 of IEEE std 1364-2005 Verilog HDL.
>>>>>>> - Additional `identifier compiler directives defined in
>>>>>> Clause 10 of
>>>>>>> this standard.
>>>>>>> - Additional `identifier compiler directives defined by 
>> software 
>>>>>>> implementations.
>>>>>>>
>>>>>>> Thus the references to Clauses 8, 10, 11, and 12 are
>>>>>> clearly wrong and
>>>>>>> it is ridiculous to leave them. The correct references do
>>>>>> appear and
>>>>>>> therefore these should be simply deleted. Even if you can
>>>>>> claim that
>>>>>>> maybe they were intended to refer to something else and
>>>> you want to
>>>>>>> find out what that was, it makes no sense to leave them 
>> in their 
>>>>>>> current form. Delete them now, and if you find in the future an 
>>>>>>> additional reference that should have appeared, add it
>>>>>> then. As they
>>>>>>> are now, they do not help anyone, and just confuse.
>>>>>>>  
>>>>>>>
>>>>>>>> * [Clause 2.8.3, pg 32]: The references to Clause 8, 10,
>>>> and 12 of
>>>>>>>> 1364-2005 may be incorrect. This was discussed in the
>>>>>> committee and
>>>>>>>> its unclear at this point whether some of the clauses
>>>> are internal
>>>>>>>> references to Verilog-AMS document itself. Also chapter
>>>>>> numbers have
>>>>>>>> changed in p1364 and LRM2.3 and need to do detailed
>>>> search for any
>>>>>>>> reference to system task/function on these before 
>> removing these 
>>>>>>>> clauses.
>>>>>>>> ==> *Note:* This is not planned for this version and
>>>> will be taken
>>>>>>>> for next revision and also deemed as not very critical.
>>>>>>>>
>>>>>>>> * [Clause 2.8.4, pg 32]: The reference to Clause 11 of
>>>>>> 1364 might be
>>>>>>>> incorrect. This was discussed in the committee and its
>>>> unclear at
>>>>>>>> this point whether some of the clauses are internal
>>>> references to
>>>>>>>> Verilog-AMS document itself. Also chapter numbers have 
>> changed in
>>>>>>>> p1364 and LRM2.3 and need to do detailed search for any
>>>>>> reference to
>>>>>>>> system task/function on these before removing these clauses.
>>>>>>>> ==> *Note:* This is not planned for this version and
>>>> will be taken
>>>>>>>> for next revision and also deemed as not very critical.
>>>>>>> Regards,
>>>>>>> Shalom
>>>>>>>
>> ---------------------------------------------------------------------
>>> Intel Israel (74) Limited
>>>
>>> This e-mail and any attachments may contain confidential 
>> material for 
>>> the sole use of the intended recipient(s). Any review or 
>> distribution 
>>> by others is strictly prohibited. If you are not the intended 
>>> recipient, please contact the sender and delete all copies.
>>>
>>>
> ---------------------------------------------------------------------
> Intel Israel (74) Limited
> 
> This e-mail and any attachments may contain confidential material for
> the sole use of the intended recipient(s). Any review or distribution
> by others is strictly prohibited. If you are not the intended
> recipient, please contact the sender and delete all copies.
> 
> 

-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
Received on Tue Jul 15 01:22:40 2008

This archive was generated by hypermail 2.1.8 : Tue Jul 15 2008 - 01:23:45 PDT