Next Verilog-AMS committee meeting: 13 Nov

Hi all,

I am away for the next two weeks. Let us meet on 13th of November. I 
would like to get feedback/concerns from you on the presentation that 
was done yesterday by Chris Vigil from IEEE and also would like to hear 
which direction would you or your corporation prefer going forward 
within the IEEE so that we would be able to make a decision on which 
option we chose for Verilog-AMS within the IEEE framework. We would 
discuss this as the first agenda point when we meet. We also need to 
start working on the PAR that needs to be submitted (within 6 months) as 
the study group was approved by the DASC.

Regarding the time for conference calls, we had the following last winter:

09:00 PM Pacific   (Thursday)
11:00 PM Central   (Thursday)
Midnight Eastern
06:00 AM Eindhoven (Friday)
10:30 AM India     (Friday)
03:30 PM Adelaide  (Friday)

Graham - Could you let us know whether you will still be actively 
participating in the calls since I have not heard from you for a while. 
This will help us in understanding whether we can change the timings so 
that US-central and east do not have to do midnight calls. If not, we 
can stick to similar times for the winter also, any time between 6am to 
8.30am on the west coast which will be between 7.30pm and 10pm in India 
(and 12.30pm-3am in Adelaide).

Regards,
Sri
-- 
Srikanth Chandrasekaran
Design Technology (Tools Development)
Freescale Semiconductor Inc.
T:+91-120-439 5000 p:x3824 f: x5199

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