Hi David, I do not see the need for output parameters. Of course, you might want to have the ability to use a module parameter or a paramset parameter in the expression for the paramset output variable. But we do not need extra functionality for that. The paramset output variables are in my view post-processing steps on the module output variables - where the paramset has the option to makes changes to the parameters before passing them on to the modules, the paramset also has the option to make changes to the output variables before passing them on to the user in the form of OP output. As necessary, by restricting the access to the output variables to DC/OP the static nature of the paramset output can be maintained. However, I doubt that this is necessary as the restrictions on expression handling within the paramset are already restricted to those in analog functions. This part of the paramset should only be activated whenever module output variables would be output. Cheers, Marq -----Original Message----- From: owner-verilog-ams@server.eda.org [mailto:owner-verilog-ams@server.eda.org] On Behalf Of David Miller Sent: Monday 3 August 2009 17:04 To: Surya Pratik Saha Cc: verilog-ams@server.eda.org Subject: Re: No BNF support for .module_output_variable_identifier Hello Surya, it appears to be an oversight. We don't have a rule to match the module_output_variable reference in: ft = .gm/('M_TWO_PI*(.cpi + .cmu)); So .gm, .cpi, .cmu are module output variables. We don't seem to have any concept in the language of output parameters, only variables according to 3.2.1 (I guess it may just have been implicitly implied). So it looks like we should also extend 3.2.1 to allow output parameters as well as output variables. And the paramset should only be referring to module output parameters, i.e. constants. The shouldn't be referring to variables (dynamic). I believe this is what we would need in the grammar: paramset_constant_expression ::= constant_primary | hierarchical_parameter_identifier | module_output_parameter_identifier | unary_operator { attribute_instance } constant_primary | paramset_constant_expression binary_operator { attribute_instance } paramset_constant_expression | paramset_constant_expression ? { attribute_instance } paramset_constant_expression : paramset_constant_expression module_output_parameter_identifier ::= '.'module_parameter_identifier Does this make sense? If anyone sees something I am missing here, please speak up. Thank you for raising this, I will add it to the Mantis database as something to address. Regards Dave Surya Pratik Saha wrote: > Hi, > In Verilog AMS 2.3.1, section 6.4.3 Paramset output variables, there is > an example of ".module_output_variable_identifier". But I could not see > this in the BNF of paramset. Is it intentional or a oversight of LRM? > -- ============================================== -- It's a beautiful day -- Don't let it get away -- -- David Miller -- Design Technology (Austin) -- Freescale Semiconductor -- Ph : 512 996-7377 Fax: x7755 ============================================== -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Tue Aug 4 00:03:02 2009
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