RE: UDF description

From: Xavier Bestel <Xavier_Bestel_at_.....>
Date: Mon Nov 16 2009 - 02:03:59 PST
LRM 2.3 doesn't say so.

	Xav

On Mon, 2009-11-16 at 11:45 +0200, Bresticker, Shalom wrote:
> But a function can reference any variables that are visible within its
> scope without passing them as arguments. It can even contain
> hierarchical references. 
> 
> Example:
> 
> module m;
> reg r;
> function f(output o);
> o = r;
> endfunction
> endmodule
> 
> Shalom
> 
> > -----Original Message-----
> > From: owner-verilog-ams@server.eda.org 
> > [mailto:owner-verilog-ams@server.eda.org] On Behalf Of Marq Kole
> > Sent: Monday, November 16, 2009 10:50 AM
> > To: verilog-ams@server.eda.org
> > Subject: RE: UDF description
> > 
> > Hi Xavier,
> > 
> > Without an input argument you could still perform extra 
> > calculations on the outputs of any of the system functions or 
> > perform some generic output to the log-file. Syntactically it 
> > will look like a variable or a parameter, though.
> > 
> > Cheers,
> > Marq
> > 
> > 
> > -----Original Message-----
> > From: owner-verilog-ams@server.eda.org 
> > [mailto:owner-verilog-ams@server.eda.org] On Behalf Of Xavier Bestel
> > Sent: Monday 16 November 2009 9:38
> > To: Bresticker, Shalom
> > Cc: David Miller; Paul Floyd; Verilog-AMS LRM Committee
> > Subject: RE: UDF description
> > 
> > Just out of curiosity, can a function with only output arguments be
> > something else than a constant ?
> > 
> > 	Xav
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