Hi all, I came across an inconsistency in the LRM 2.3.1 regarding usage of register in $random/$arandom system task : Section "9.13.1 $random and $arandom" : "The random_seed argument may take one of several forms. It may be omitted, in which case the simulator picks a seed. It may be a reg, integer, or time variable, in which case it is an inout argument; that is, a value is passed to the function and a different value is returned. The variable should be initialized by the user prior to calling $random and only updated by the system function. The function returns a new 32-bit random number each time it is called." However, "Section 7.2.1 Domains" says : "The domain of a value refers to characteristics of the computational method used to calculate it. In Verilog- AMS HDL, a variable is calculated either in the continuous (analog) domain or the discrete (digital) domain every time. The potentials and flows described in natures are calculated in the continuous domain, while register contents and the states of gate primitives are calculated in the discrete domain. The values of real and integer variables can be calculated in either the continuous or discrete domain depending on how their values are assigned." Since a register can be calculated in the continuous domain because being an out argument of a $random function, that leads to a contradiction. I think same issue would apply to time objects since they are pure discrete objects. Regards. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Nov 23 00:20:08 2009
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