Hi Sri,
done. Can be found at:
http://www.eda-stds.org/verilog-ams/htmlpages/cdd.html
Cheers...
Dave
On 02/10/2010 08:23 AM, Sri Chandra wrote:
>
> FYI. I sent this to the AMS list in the morning but since it contained
> attachments it did not get out of the filter. These documents are
> presentations for the P1800 requirements gathering group from
> Verilog-AMS and ASVA and is going to be discussed in tonight's ASVA call.
>
> Dave - I will send you the two documents, can you update it on the
> reflector please.
>
> -------- Original Message --------
> Subject: Fwd: P1800 meeting slides
> Date: Wed, 10 Feb 2010 10:35:48 +0530
> From: Sri Chandra <sri.chandra@freescale.com>
> Organization: Freescale Semiconductor Inc.
> To: Verilog-AMS LRM Committee <verilog-ams@eda.org>
>
>
> Regards,
> Sri
>
> -------- Original Message --------
> Subject: P1800 meeting slides
> Date: Tue, 9 Feb 2010 12:21:45 -0700
> From: Little Scott-B11206 <B11206@freescale.com>
> To: <asva@lists.accellera.org>
>
> Hi all:
>
> I have attached two sets of slides. One is the set of slides that the
> Verilog-AMS committee intends to present. The other is the set of
> slides we are proposing to present. Both groups have requested a single
> 30 minute slot.
>
> After a bit of e-mail discussion, Ken, John, and I decided that it is
> best to keep things simple and focus on a high-level overview of the
> general direction and a crisp description of what we would like from the
> P1800 committee. We will discuss what changes should be made to these
> slides during the meeting tomorrow.
>
> Thanks,
> Scott
>
>
>
>
-- ============================================== -- It's a beautiful day -- Don't let it get away -- -- David Miller -- Design Technology (Austin) -- Freescale Semiconductor -- Ph : 512 996-7377 Fax: x7755 ============================================== -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Feb 10 12:48:36 2010
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