Agenda for Verilog-AMS committee meeting - 17 Feb 2010

From: Sri Chandra <sri.chandra@freescale.com>
Date: Tue Feb 16 2010 - 03:41:26 PST

Date: 17 Feb 2010

Call-In Details:
USA Toll Free : 8008671147
Australia Toll Free: 1800009128
India Toll Free : 0008006501482
Netherlands : 08002658223
Passcode: 0970751

California: 2.00p (Wednesday)
Texas: 4.00p
New York: 5.00p
Netherlands: 11.00p
Israel: Midnight
Delhi: 3.30a (Thursday)
South Australia: 8.30a

Agenda:
* Any feedback/updates for P1800 requirements gathering presentation
scheduled for Feb 26th? Presentation has been posted on website:
http://www.eda-stds.org/verilog-ams/htmlpages/cdd.html
(The presentation will be done in person by Ken Bakalar from Mentor and
has been submitted to Karen. If there are any minor suggestions it can
be accommodated)

* Opening of donation window. Cadence would like to donate a wreal
proposal for consideration by the Verilog-AMS committee.

As per process, a donation window needs to be opened and a member of the
committee needs to move to open a donation window and agreed upon by
members for this donation and a time line for the functionality to be
delivered. Each donor has an opportunity to present their donation to
the committee (with a letter potentially transfering rights to the
donation). After the donation(s) is delivered, the committee would
review/scrutinize, and based on vote would approve or reject it.

Regards,
Sri

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