Verilog-AMS meeting minutes - 6 Oct 2010

Date: 6 October 2010, 6a California time

Martin O'Leary, Cadence
Graham Helwig, ASTC
Ian Wilson, Berkely DA
Achim Bauer, EXL
Shalom Bresticker, Intel
Sri Chandra, Freescale
Geoffrey Coram, Analog Devices
Scott Little, Freescale
Dave Miller, Freescale

Notes:
* Discussion on new call times once US moves into winter time. The
current schedule gets too early in California and too late in Adelaide
as the clocks move opposite directions
   - Sri has sent out few options

* BNF discussions
   - subroutines
    o built-in functions don't include built-in system function (i.e $sin)
    o Built-in system functions defined in section 4.3.1
    o need to added $... functions into syntax

   - ddx is currently clubbed under filter functions however
semantically it is documented that it does not have same restrictions as
filter functions
     o move ddx to a separate BNF

   - discussion about solving equations once within a event conditional
statement.
     o An example will be sent out to clarify this (Achim?)

   - section numbering needs to be fixed

   - constant_primary
    o need to investigate because it is used across AMS and
SystemVerilog syntax

   - why analog_net_reference has "analog_"?
    o used in branch declaration, prefix used to highlight it can only
be analog.

* ASVA are currently under discussions on specific capabilities with
regards to AMS extensions to support analog assertions. Scott and his
team will list detailed requirements/specs on this in a future meeting.

Regards,
Sri

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