Re: Verilog-AMS Committee Meeting Minutes - 17th Feb 2011

On 02/18/2011 09:29 AM, Dave Miller wrote:
> ..

> The next item that was discussed was the BNF, do we want to have an appendix that is just the AMS changes to the P1800 or do we want to support a single merged BNF? Still undecided, but feel the most useful option is a single merged BNF. Yes, it does mean we need to keep it up to date with changes in the parent P1800 BNF, but changes in the BNF are not quite as drastic as the potential document changes between revisions.

As I've said before: the BNF is usually the last thing you need to worry about, nothing should be gated on BNF analysis at this point. By the time the AMS stuff gets incorporated the BNF for the rest of SV will have changed, the semantics of object interaction are more important.

> Dave asked a question related to the request by Jonathan regarding detecting of floating node conditions during run time.
>
> Geoffrey explained that they are not ideal floating nodes, but situations where for example, a MOS device is turned off. The node may exhibit a very tiny conductance and be very loosely controlled. It is these high impedance nodes that people are interested in detecting. If the tools could detect these conditions, it would be very useful.

That sounds like the kind of thing you want to put in the models as an assertion. You might want to add an assertion phase where you can poke the matrix and see what the node impedance is after it has been solved. I would pass that one on to the analog assertions committee.

Kev.

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