Bus holder model

Philippe Mahe (pmahe@avanticorp.com)
Wed, 28 Oct 1998 16:46:36 +0100

We have an issue describing and backannotating single pin cells : example
We have a bus holder :

|\
i _____| \o______
| | / |
| |/ |
| /| |
|____o/ |____|
\ |
\|

Pin I should be model wize an inout, so vital needs tipd_i statement.
But in sysnopys we need to declare this as input because there is no function
associated with this pin. Plus there is no timing for this cell.

The work arround we are using is to describe in synopsys the I pin as input,
to have a vhdl model for the cell not a vital model. But back-annotation
is giving an error, but still continues and works for the other cells.
Our customer is unhappy about this, so we would like to fix somehow the issue
but running out of ideas.

Thanks in advance,

Best Regards.

Phil.

Email : Philippe_Mahe@avanticorp.com