Subject: Conference Notice
From: Dennis Brophy (dennisb@model.com)
Date: Mon Oct 02 2000 - 16:39:21 PDT
A conference notice you might have some interest in.
-----Original Message-----
From: Vincent Mooney <vincent.mooney@ece.gatech.edu>
Date: Sun Oct 1 17:31:42 2000
To: vital@eda.org
Subject: CASES 2000 Advanced Program
Reply-To: cases@capsl.udel.edu
=========================
C A S E S 2 0 0 0
International Conference on Compilers, Architecture, and Synthesis
for Embedded Systems
(http://www.capsl.udel.edu/conferences/cases2000)
November 17-18, 2000
Doubletree Hotel
San Jose, California
U.S.A.
=========================
ADVANCED PROGRAM AND REGISTRATION INFORMATION
=========================
IMPORTANT DATES
---------------
CUTOFF DATE FOR ONLINE REGISTRATION:
NOVEMBER 10, 2000
(at http://www.capsl.udel.edu/conferences/cases2000)
ON-SITE REGISTRATION AT DOUBLETREE HOTEL:
NOVEMBER 16, 2000 (Thu) 7pm to 9pm
NOVEMBER 17, 2000 (Fri) 7.30am to 8.30am
CUTOFF DATE FOR HOTEL REGISTRATION: OCTOBER 26, 2000
(Normal rates only thereafter)
==========================
CONFERENCE HIGHLIGHTS
---
INVITED TALKS
November 17 (Fri) 9am to 10am
RIGOROUS DEVELOPMENT OF EMBEDDED SYSTEMS
Amir Pnueli, New York University and
The Weizmann Institute of Science
November 18 (Sat) 9am to 10am
THE ERA OF EMBEDDED COMPUTING
B. Ramakrishna (Bob) Rau, Hewlett-Packard Laboratories
---
PANEL DISCUSSION
November 18 (Sat) 4pm to 5.30pm
SYSTEM ON A CHIP: HARDWARE DREAM OR SOFTWARE NIGHTMARE?
Moderator: Patrick Devaney, Panasonic AVC American Labs
Panelists: Willie Anderson, Analog Devices
Jon Fields, Lucent Technologies
Joachim Kunkel, Synopsis
Kees Vissers, TriMedia Technologies
==========================
ADVANCED PROGRAM
NOVEMBER 16, 2000 (Thursday)
7pm-9pm Pre-registration
--------------------------
NOVEMBER 17, 2000 (Friday)
9am-10am Invited Talk
RIGOROUS DEVELOPMENT OF EMBEDDED SYSTEMS
Amir Pnueli, New York University and
The Weizmann Institute of Science
COFFEE BREAK - 10am - 10.30am
Session 1 (10:30am - 12:15pm)
* "Efficient Compilation of ESTEREL for Real-Time Embedded Systems"
Daniel Weil, Valerie Bertin, Etienne Closse, Michel Poize,
Patrick Venier, Jacques Pulou; France Telecom R&D, Laboratoire
d'Automatique de Grenoble, and Alcatel Business Systems
* "Eliminating External Fragmentation in a Non-Moving Garbage
Collector for Java"
Fridtjof Siebert; Universitat Karlsruhe
* "A Code Generation Framework for Java Component-based Designs"
Jeff Tsay, Christopher Hylands, and Edward A. Lee; University
of California, Berkeley
* "A Joined Architecture/Compiler Design Environment for ASIPs"
Jurgen Teich, and Ralph Weper; University of Paderborn
* "A Preprocessing Step for Global Loop Transformations for Data
Transfer and Storage Optimization"
Koen Danckaert, Francky Catthoor, and Hugo De Man; IMEC
LUNCH BREAK - 12.15pm - 1:45pm
Session 2 (1:45pm to 3.30pm)
* "PROMPT: A Mapping Environment for Telecom
Applications on "System-On-a-Chip""
Michel Barreteau, Thierry Grandpierre, Philippe Bonnot,
Juliette Mattioli, Christophe Lavarenne, Philippe Kajifasz,
Corinne Ancourt, Francois Irigoin, and Yves Sorel; Thomson-CSF,
INRIA, Ecole des Mines de Paris, and SIMULOG
* "Embedding SDL Implemented Protocols into DSP"
Antti Takko, Marko Hannikainen, Jarno Knuutila, Timo Hamalainen, and
Jukka Saarinen; Tampere University of Technology, and Nokia Mobile
Phones
* "Adapting Software Pipelining to Reconfigurable Hardware"
Timothy J. Callahan, and John Wawrzynek; University of California,
Berkeley
* "Specification and Synthesis of Real-Time Embedded Distributed
and Parallel Multiprocessor-based Signal Processing System",
Randall S. Janka, and Linda M. Wills; Cadence Design System Inc.,
and Georgia Institute of Technology.
* "Fast Automated Design Space Exploration in PICO",
Santosh G. Abraham, and B. Ramakrishna (Bob) Rau; Hewlett-Packard
Labs
COFFEE BREAK - 3:30pm - 4pm
Session 3 (4pm - 5:45pm)
* "Design and Implementation of a Hierarchical Exception Handling
Extension to SystemC"
Prashant Arora, and Rajesh Gupta; University of California,
Irvine
* "Scheduling Algorithms for Automated Synthesis of Pipelined
Designs on FPGAs for Applications described in MATLAB"
Malay Haldar, Anshuman Nayak, Alok Choudhary and Prith Banerjee;
Northwestern University
* "Code Generator Optimizations for the ST100 DSP-MCU Core"
Benoit Dupont de Dinechin, Francois de Ferriere, Chrisophe Guillon,
and Arthur Stoutchinin; ST Microelectronics
* "Dynamic Scheduling of Concurrent Tasks with Cost Performance
Trade-off"
Peng Yang, Dirk Desmet, Francky Catthoor, and Diederik Verkest; IMEC
* "Architecture for Embedded Software Integration with Reusable
Components"
Shige Wang and Kang G. Shin; University of Michigan
HOSPITALITY BOOTH - 6pm - 9pm
Star*Core
--------------------------
NOVEMBER 18, 2000 (Saturday)
9am-10am Invited Talk
THE ERA OF EMBEDDED COMPUTING
B. Ramakrishna (Bob) Rau, Hewlett-Packard Laboratories
COFFEE BREAK - 10am - 10.30am
Session 4 (10:30am - 12:15pm)
* "Region-based Caching: An Energy-Delay Efficient Memory Architecture
for Embedded Processors"
Hsien-Hsin S. Lee, and Gary S. Tyson; University of Michigan
* "Embedded ISA Support for Enhanced Floating-Point to Fixed-Point
ANSI C Compilation"
Tor Aamodt and Paul Chow; University of Toronto
* "Energy-Oriented Compiler Optimizations for Partitioned
Memory Architectures"
V. Delaluz, M. Kandemir, N. Vijaykrishnan, and M. J. Irwin;
Pennsylvania State University
* "Unroll-and-jam for Imperfectly-nested Loops in DSP Applications"
Yonghong Song, and Yuan Lin; Purdue University, and Star*Core
* "Handling Irregular ILP within Conventional VLIW Schedulers using
Artificial Resource Constraints",
Subramanian Rajagopalan, Manish Vachharajani, and Sharad Malik;
Princeton University,
LUNCH BREAK - 12.15pm - 1:45pm
Session 5 (1:45pm - 3:30pm)
* "A Programmable Unified Cache Architecture for Embedded
Applications"
Afzal Malik, Bill Moyer, and Dan Cermak; Motorola Inc.
* "Parallel Saturating Multioperand Adders"
Michael J. Schulte, and Pablo I. Balzola; Lehigh University
* "A Dynamic Memory Management Unit for Embedded Real-Time
System-on-a-Chip"
Mohamed Shalan, and Vincent J. Mooney III; Georgia Institute of
Technology
* "A First-step Towards an Architecture Tuning Methodology"
Greg Stitt, Frank Vahid, Tony Givargis, and Roman Lysecky;
University of California, Riverside
* "Flexible Instruction Processors",
Shay Ping Seng, Wayne Luk, and Peter Y.K. Cheung; Imperial College
COFFEE BREAK - 3.30pm - 4pm
PANEL DISCUSSION - 4pm to 5.30pm
"System on a chip: Hardware Dream or Software Nightmare?"
Moderator: Patrick Devaney, Panasonic AVC American Labs
Panelists: Willie Anderson, Analog Devices
Jon Fields, Lucent Technologies
Joachim Kunkel, Synopsis
Kees Vissers, TriMedia Technologies
BANQUET - 7.30pm - 9.30pm
==========================
STEERING COMMITTEE:
James R. Boddie
Lucent Technologies
Guang R. Gao
University of Delaware
Vinod Kathail
Hewlett-Packard Labs
Edward Lee
Univ. of California Berkeley
Reid Tatge
Texas Instruments
CONFERENCE CHAIR:
Krishna V. Palem
Georgia Institute of Technology
COORDINATION VICE-CHAIR :
Weng-Fai Wong
Georgia Institute of Technology
and National Univ. of Singapore
LOCAL ARRANGEMENTS VICE-CHAIR:
Praveen Murthy
Angeles Design Systems
PANELS VICE-CHAIR:
Jack W. Davidson
University of Virginia
PUBLICATIONS VICE-CHAIR:
Jaime Moreno
IBM T.J. Watson Research Center
PUBLICITY VICE-CHAIR:
Vincent J. Mooney III
Georgia Institute of Technology
PROGRAM COMMITTEE:
Shuvra S. Bhattacharyya
University of Maryland
Henk Corporaal Delft
University of Technology
Srinivas Devadas
Massachusetts Institute of Technology
Christine Eisenbeis
INRIA Rocquencourt
Antonio Gonzalez
Universitat Politecnica de Catalunya
Rajesh Gupta
University of California at Irvine
Nevin Heintze
Lucent Bell Laboratories
Kathryn S. McKinley
University of Massachusetts, Amherst
Lothar Thiele
ETH Zurich
Frank Vahid
University of California at Riverside
Wei Zhao
Star*Core
==========================
CASES 2000 gratefully acknowledges the sponsorship of:
Hewlett-Packard IBM Star*Core
==========================
FOR INQUIRIES PLEASE EMAIL: cases@capsl.udel.edu
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