Memory

Application Notes

Title	Size
XAPP065: XC4000 Series Edge-Triggered and Dual-Port RAM Capability	50 KB
XAPP057: Using Select-RAM Memory in XC4000 Series FPGAs	200 KB
XAPP052: Efficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators	70 KB
XAPP053: Implementing FIFOs in XC4000 Series RAM	230 KB
XAPP051: Synchronous and Asynchronous FIFO Designs	130 KB

Application Briefs

Title	Size
XBRF001: XC4000E Select-RAM: Flexibility with Speed	20 KB
XBRF003: XC4000E Select-RAM: Maximum Configurability	20 KB

XCell Articles

Title	Issue
XC4000XL FPGAs Interface to SDRAMs at 100MHz	Q2 '98
A 200-MHz Pulse Generator	Q1 '98
XC4000 Series Select-RAM Memory: Advantages and Uses	Q3 '96
Synchronous RAM Improves System Speed	Q4 '95
Synchronous RAM Timing in the XC4000E FPGA	Q4 '95
FIFO Buffer Designs in the XC4000E/X FPGA Families	Q1 '96
Examining XC4000E RAM Capabilities	Q3 '95