Xilinx XUP Workshop Schedule & Registration 

Workshop Registration

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Workshop Summary 

If you have thought about teaching an engineering course which utilizes Programmable Logic technology, then attending one of Xilinx's University Workshops is the best way to get started.  The purpose of Xilinx's University Workshops is to teach academic instructors about Programmable Logic technologies from Xilinx, to show how to teach a course using the latest programmable logic technology, and to provide instructors with the resources and advice to develop their own 1st through 5th year curriculum. Programmable Logic technologies covered include FPGAs (Field Programmable Gate Arrays), CPLDs (Complex Programmable Logic Devices), and Dynamically Reconfigurable Logic.  Instruction for the current set of workshops  will be primarily in English, although some local translation may be available in China, S.Korea, and Taiwan. 

These workshops involve on-site presentation combined with hands-on lab exercises on the PC. Participants receive a certificate of course completion. Workshops are taught mainly by Xilinx professionals.  In some workshops, some instruction is also given by local professors who have experience with Xilinx products in their own coursework in areas such as introductory and upper level digital logic design, processor architecture, digital signal processing, VLSI design, data communications, reconfigurable logic, and various advanced level projects. 

The great news is that these WORKSHOPS ARE FREE!! Since seats are limited at each event and demand is typically quite high, we recommend that you sign up as soon as possible. 

If you are unable to attend a workshop, then Xilinx University Program's Internet Seminar is a good alternative. The Xilinx University Internet Seminar is a virtual seminar which enables instructors or students anywhere with an internet connection to get an overview of Xilinx technology and usage. The archive of the July, 1997 session lasts approximately 5 hours.  Go here to attend or learn more about the XUP Internet Seminar Archive. 
 

Workshop Schedule for June - September, 1998 

University of Pennsylvania Workshop

Instituto Politecnico Nacional –

IC Design Education Center (IDEC) Workshop

Tsinghua University Workshop

National Chinyi Institute of Technology / (CIC) Workshop

Universite Montpellier II (Institut des Sciences de l'Ingenieur de Montpellier) Workshop 
September 2-4                   Montpellier,  FRANCE 

Workshops last from 9:00am to 5:00pm each day. 
Day 3 of Montpellier workshop goes until 1:00pm. 
 

Course Contents 

• Introduction to PLD/FPGA technologies, architectures and programming methods
• XC4000 FPGA family architecture training
• XC9500 CPLD family architecture training
• Dynamically Reconfigurable Logic overview
• FPGA Express for VHDL and Verilog HDL synthesis 
• Hands on Labs using Foundation Express 1.4 software!
• Exciting applications and project suggestions 
• Roadmap of upcoming Xilinx products and industry trends
• Prentice Hall's Xilinx Student Edition lab tutorial 
• Professor guided outline of actual class and lab (depending on workshop)
• Comparison of the economics of FPGAs versus ASICs
• Participation in Xilinx's University Program

Go here to REGISTER