Cadence Interface - Documentation

---

  to view the PDF files below.

M1: Concept

• Cadence Interface/Tutorial Guide for Alliance 1.4, 2/98 (1.2 MB)
  PDF version of the Cadence Interface/Tutorial manual included in the Xilinx on-line documentation for the Alliance A1.4 release of software.



• Cadence M1.x Design Conversion Guide
  Design conversion application note hilighting the concepts necessary for re-targeting a Concept schematic design using the XACT release to the new M1 flow.
  • Cadence M1.x Design Conversion Guide, v1_5, 6/98 (62 kB)
  • Cadence M1.x Design Conversion Guide, v1_4, 5/98 (89 kB)
  • Cadence M1.x Design Conversion Guide, v1_3, 2/98 (54 kB)

• XAPP108: Chip-Level HDL Simulation Using the Xilinx Alliance Series , 5/98 (200 kB)
  Application Note describing the basic flow and issues to be aware of when performing a chip-level simulation of a Xilinx device using a Verilog or VHDL simulator and the Xilinx Alliance 1.4 release.


Synthesis and Simulation Design Guide, 4/98 (1.3 MB)
Manual providing a general overview for designing into FPGAs using VHDL and Verilog including Verilog simulation techniques.


• Synopsys (XSI) - Synthesis and Simulation Design Guide, 3/98 (1.3 MB)
  Similar manual to the "Synthesis and Simulation Design Guide" only focuses specifically on the Synopsys FPGA or Design Compiler Synthesis tool.

• Using the Xilinx Interface 4.0 with XACT 5.x 5/96 (37 kB)
  Cadence application note describing procedures for using the pre-Unified / pre-9404 Cadence Concept and Composer libraries and interface with XACT 5.x.

XACT: Verilog

• Cadence Verilog-XL Interface and Libraries, (107 kB)
  Full documentation for ES-VERILOG v5.2 Interface to Verilog-XL