System-Level Design

Capturing your Design

Using tools from The MathWorks to capture system-level designs, in conjunction with the Xilinx block set and the Xilinx System Generator, you will be able to develop complex system which can then be targeted to Xilinx FPGAs

The MathWorks MATLAB® & Simulink®
MATLAB handles a range of computing tasks in engineering and science, from data acquisition and analysis to application development. The MATLAB environment integrates mathematical computing, visualization, and a powerful technical language. Built-in interfaces let you quickly access and import data from instruments, files, and external databases and programs. In addition, MATLAB lets you integrate external routines written in C, C++, FORTRAN, and Java with your MATLAB applications.

Simulink is an interactive tool for modeling, simulating, and analyzing complex systems. It enables you to build graphical block diagrams, simulate digital and analog/mixed-signal systems, evaluate system performance, and refine your designs. Simulink integrates seamlessly with MATLAB, providing you with immediate access to an extensive range of analysis and design tools. Simulink is tightly integrated with Stateflow® for modeling event-driven behavior. These benefits make Simulink the tool of choice for control system design, DSP design, communications system design, and other simulation applications.

Key Features when used in a Xilinx DSP environment

• Build graphical block diagrams, simulate complex systems, evaluate system performance, and refine your designs.
• Model digital, analog/mixed-signal, and control logic components.
• Integrates seamlessly with MATLAB, providing you with immediate access to an extensive range of analysis and design tools.
• Tightly integrated with Stateflow for modeling event-driven behavior.
• Utilize an extensive DSP Libraries.

Xilinx System Generator

The Xilinx System Generator bridges the gap between your conceptual architectural design and the actual implementation in a Xilinx FPGA. The System Generator for Simulink, developed in partnership with The MathWorks enables designers to develop high-performance DSP systems for Xilinx FPGAs using the popular MATLAB/Simulink from The MathWorks

Key Features of the Xilinx System Generator

• Bit and cycle-true simulation of FPGA circuits within a Simulink model
• Automatically generate from this Simulink model a synthesizable Hardware Description Language (VHDL or Verilog) implementation, including a testbench
• Maps specific blocks of your system design to highly optimized Xilinx algorithms also known as IP cores.

Continue to Step 2 -- HDL Synthesis