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Xilinx FPGAs give you the freedom to create custom
word lengths for different sections within the same design (unlike
fixed-width, general-purpose DSP processors or application specific
ASSP and ASIC devices). The Xilinx DSP tool-set supports different
numbers of bits, pipeline stages, and implementation alternatives.
For channels that require more bits of precision, the IP parameter
can be easily changed and accommodated by the software.
You can easily optimize your design for performance, silicon area,
or power dissipation by implementing your algorithm in either a parallel
or serial structure.
- Use fully parallel structures to achieve the highest possible
data throughput or to save power by lowering the system clock
- Conversely, use fully serial structures to achieve the smallest
possible silicon area and the lowest cost, while still maintaining
respectable performance
Field
Upgradeability
Design iterations are inevitable, which means your design platform
must be adaptable. Xilinx FPGAs are SRAM-based, allowing you to change
your design in-system at any time. This approach ensures that you
can modify your system requirements to future changes in architectural
definitions or standards. Xilinx FPGAs offer an ideal mechanism for
performing remote hardware updates for systems already in the field.
The ability to remotely update hardware with new features or the latest
bug fix can extend the useful life of existing systems, and significantly
cut maintenance and support costs. Many of today's systems already
come with some form of communications or microprocessor interface
built in, making it easy to add remote field update capability. For
more information on this cutting edge capability, please go to: www.xilinx.com/xilinxonline
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![[Xilinx_Inc.]](../images/xtremedsp.gif)
