Off-chip RAM
Parameterized word length and depth
FIFO full and empty flags
Statically programmable almostfull flag to indicate when the FIFO core reaches a specific level, usually when writing into the FIFO
Statically programmable almostempty flag to indicate when the FIFO core reaches a specific level, usually when reading from the FIFO
Global reset of the FIFO address pointers and flag logic
3200DX, MX, SX, SX-A, eX
The SmartGen FIFO Flag Controler is designed for off-chip RAM. It is a state machine generating the Flags typically used by a FIFO.
The asynchronous clear (Aclr) can be active low or active high (low is the default option and should be preferably used as for all synchronous elements in the two supported families). We will further use the word active to specify the state of a given signal. When the asynchronous clear is active, all internal registers are reset to '0'. The FIFO Controler is now in an empty state. At power up time, the FIFO must be initialized with a asynchronous clear cycle.
The full flag signal FF is optional. The FF signal is active high only (if selected) and indicates when the FIFO is full. The signal is asserted high on the rising (RISE) or falling (FALL) edge of the clock signal Clock with no delay. The FULL flag is always a function of the total block size not the user depth setting. This is tied to the silicon counter.
The empty flag signal EF is optional. The EF signal is active low only (if selected) and indicates when the FIFO is empty. The signal is asserted low on the rising (RISE) or falling (FALL) edge of the clock signal Clock with no delay.
The write enable (WE) and read enable (RE) signals are active high requests signals for for controlling the FIFO flags. They should be logically equivalent to the write and read enable controlling the off-chip RAM.
The FIFO Controller offers a parameterizable almost-full flag (AFF). The AFF flag is asserted high when the FIFO contains aff_val words or more as defined by the parameter AFF_VAL. Otherwise, AFF is asserted low. The value aff_val value is a parameter to the core, and thus logic is built at generation time to realize the almost-full flag function.
The FIFO Controller offers a parameterizable almost-empty flag (AEF). The AEF flag is asserted low when the FIFO contains aef_val words or less as defined by the parameter AEF_VAL. Otherwise, AEF is asserted high. The value aef_val value is a parameter to the core, and thus logic is built at generation time to realize the almost-empty flag function.
Port Description |
Port Name |
Size |
Type |
Req/Opt? |
Function |
Clock |
1 |
Input |
Req. |
Write and read clock |
WE |
1 |
Input |
Req. |
Write enable associated to the flag logic only |
RE |
1 |
Input |
Req. |
Read enable associated to the flag logic only |
Aclr |
1 |
Input |
Req. |
Asynchronous Clear |
EF |
1 |
Output |
Opt. |
Empty Flag |
FF |
1 |
Output |
Opt. |
Full Flag |
AEF |
1 |
Output |
Opt. |
Almost Empty Flag |
AFF |
1 |
Output |
Opt. |
Almost Full Flag |
Parameter Description |
Parameter |
Value |
Function |
WIDTH |
Width |
Word length of Data and Q |
DEPTH |
Depth |
Number of FIFO words |
FF_POLARITY |
1 2 |
FF can be active high or not used |
EF_POLARITY |
0 2 |
EF can be active low or not used |
AFF_VAL |
aff_val (see parameter rules) |
AFF value (not used if aff_val is 0) |
AEF_VAL |
aef_val (see parameter rules) |
AEF value (not used if aef_val is 0) |
CLK_EDGE |
RISE FALL |
Clock can be rising or falling |
Implementation Parameters - MX/DX |
Parameter |
Value |
Description |
LPMTYPE |
LPM_FIFO_DQ |
Generic FIFO category |
LPM_HINT |
FFIFOCTRL |
High speed FIFO Controller |
MFFIFOCTRL |
Medium speed FIFO Controller |
Implementation Parameters - SX/SX-A/eX |
Parameter |
Value |
Description |
LPM_HINT |
FCTR |
FIFO Controller |
Fan-In Parameters |
Parameter |
Value |
Description |
CLR_FANIN |
AUTO MANUAL |
See Fan-in Control section |
CLK_FANIN |
AUTO MANUAL |
See Fan-in Control section |
WE_FANIN |
AUTO MANUAL |
See Fan-in Control section |
RE_FANIN |
AUTO MANUAL |
See Fan-in Control section |