Anything that describes your design, or is needed to program the device, is a project source. These may include schematics, HDL files, simulation files, testbenches, etc. Import these source files directly into your Libero project.
To import a file:
From the File menu, choose Import Files.
In Files of type, choose the file type.
In Look in, navigate to the drive/folder where the file is located.
Select the file to import and click Open.
Notes:
Keep and import your VHDL package and behavioral and structural VHDL source files separately. Do not place your VHDL package into your source file.
You cannot import a Verilog File into a VHDL project and vice versa.
CoreConsole projects (ProASIC3 and ProASIC3E only) include all the files needed by Libero IDE into your project folder. Libero IDE lists the CoreConsole project in the project manager along with its files (each core includes its own block symbol files, HDL source files, constraint files, implementation files, memory files, etc.).
When you import a CoreConsole Configuration File, Libero IDE creates a new directory in your project folder called coreconsole that includes all the required CoreConsole files. Libero IDE preserves the structure of the original CoreConsole directory, except for the ViewDraw symbol - it gets copied into the viewdraw folder in your project.
|
File Type |
File Extension |
|
ViewDraw Symbol |
*.1-9 |
|
ViewDraw Schematic |
*.1-9 |
|
Behavioral and Structural VHDL |
.vhd, .vhdl |
|
VHDL Package |
.vhd, .vhdl |
|
SmartGen core |
.gen |
|
Verilog Include |
.h |
|
Behavioral and Structural Verilog |
.v |
|
Stimulus |
.vhd, .vhdl, .v |
|
EDIF Netlist |
.edn |
|
CoreConsole Project |
.ccp |
|
Simulation file required by CoreConsole |
.bfm |
|
Memory file |
.mem |