PALACE is useful as a performance enhancement tool; Actel recommends that you run PALACE after the design has passed Designer place-and-route. This enables you to compare your layout results with and without PALACE.
Note: The current PALACE version only supports ProASICPLUS, ProASIC3, ProASIC3E, and Axcelerator.
To use PALACE with Libero:
Open a PALACE supported
project in the Libero IDE. If it is the first time you have opened your
project in the latest version of the Libero IDE, the software performs
a conversion that brings your project up to date, as shown in the figure
below.
Libero IDE opens new projects with a default implementation of 1 (impl1).
If you have saved more than one implementation in your project, they are
available in the Design Implementation drop-down menu.
Click the Configure
Design Flow button in Libero’s Design Flow window to add PALACE
to your design flow. The Configure Flow dialog box appears. Select the
Use PALACE (Physical Synthesis) to enable the PALACE flow. Click OK to
continue. Libero displays a message explaining that it backs up your files
and creates a new implementation of your design before it runs PALACE,
and asks if you want to proceedas
shown in the figure below.
Create Implementation Message in Libero
Click Yes to continue (create
a new implementation and complete physical synthesis with PALACE). If
you click Yes, Libero creates a new implementation and adds PALACE to
your Design Flow window.
Click No to cancel and return
to the main Libero IDE GUI.
Click PALACE
in the Design Flow window to display the PALACE options dialog box, as
shown in the figure below.
PALACE Options Dialog Box
Logic synthesis effort
0 - No optimization, no change in area
1 - Combinatorial / sequential optimization with area focus
2 - Combinatorial optimization mode
3 - Both combinatorial / sequential optimization performed,
register balancing, replicating, etc.
4 - Extensive optimization, exhausting all possible algorithms
to achieve timing closure
Physical synthesis effort
1 - Minimum effort for physical placement
2 - Complete physical placement generated for design
Delay relaxation percentage to reduce area
0 - 100: Specifies the percent of delay relaxation on the best
possible delay PALACE can achieve. Default is 0, where PALACE aims for
maximum optimization.
Max core cell utilization percentage:
0 - 100: Specifies the maximum core cell utilization before
PALACE promotes the design to next die size. Default is 100 and allows
full resource usage.
Set your options and click OK
to continue.
You must organize your
constraint files to guide the PALACE optimization effort. Click Organize Constraint Files to open the
Select Constraints for PALACE dialog box (as shown in the figure below).
The Select Constraints for PALACE dialog box enables you to associate
your project's SDC (timing) and GCF (physical) constraints with PALACE.
The list at left shows all the constraint files you have imported into
your project. The list at right shows all the constraint files you wish
to pass to PALACE (constraint files for PALACE).
Actel recommends that you not use the synthesis generated constraint
files in Designer with PALACE. If you insist on using it, Actel recommends
you import it in the following order:
- Synthesis generated constraint files
- User constraint files
Select Constraints for PALACE Dialog Box
When you run PALACE, Libero passes all the constraint files associated
with PALACE to the tool.
After you set all your options, click OK
to run physical synthesis with PALACE.
PALACE completes physical synthesis and the PALACE box in the Design
View window turns green. Right-click the PALACE box and select Open
Log File to view the PALACE log file.
Run place-and-route in
Designer. Libero passes the PALACE-generated netlist and constraint files
to Designer automatically.
If you are not satisfied with your results, return to your previous
implementation, or modify your PALACE options and re-run physical synthesis.