For Fusion, ProASIC3E, ProASIC3, and Axcelerator devices, you can use a PDC file to create LocalClock regions. For ProASIC PLUS and ProASIC devices, you can create LocalClock regions in ChipPlanner or define them in a GCF file. See the Floorplanning ProASIC/ProASIC PLUS Devices for Increased Performance application note for more information.
When you create a LocalClock region, the selected net and all the macros driven by that net are assigned to the LocalClock region.
To create a LocalClock region from the MVN Hierarchy window:
In the Net
tab of the Hierarchy window, select
a clock net.
Clock nets have a clock icon next to them in the Net
view.
From the Region menu, choose Create LocalClock, or click its icon in the toolbar.
Drag a rectangle from the top-left corner of the new LocalClock region to its bottom-right corner. As you drag out the region, a tooltip appears in its lower-right corner showing how many tiles, RAMs, and I/Os are in the region.
Note: A net that is already assigned to a LocalClock region cannot be assigned to another non-overlapping region.
For ProASIC and ProASIC PLUS families, the RAMs and I/Os are assigned to the LocalClock region unless the Compile option “Include RAM and I/O in Spine and Net Regions” is cleared.
The default name of the LocalClock region is LocalClock_<netname> (for example, LocalClock_exl_d_0), and its type is inclusive.
Designer does not support exclusive LocalClock regions. LocalClock regions are inclusive by default, and you cannot change their type.
Note: To assign a signal to a spine, the spine itself and the entry MUX must be free. However, this does NOT necessarily require the corresponding global network to be unused. For example, you can assign non-global signals to spines when four global networks are used by other high-fanout nets. For more information, refer to the application note Optimal Usage of Global Network Spines in ProASIC PLUS Devices, which is available from the Actel web site.