pin_assign [-nofix] -port portname -pin pin_number
pin_assign -port portname [-iostd value][-iothresh value][-outload value][-slew value][-res_pull value]
-nofix
Unlocks the pin assignment (by default, assignments are locked).
-port portname
Specifies the name of the port to which the pin is assigned.
-pin pin_number
Specifies the alphanumeric number of the pin to assign.
-iostd value
Sets the I/O standard for this pin. Choosing a standard allows the software to set other attributes such as the slew rate and output loading. If the voltage standard used with the I/O is not compatible with other I/Os in the I/O bank, then assigning an I/O standard to a port will invalidate its location and automatically unassign the I/O. The following table shows the acceptable values for the supported devices:
I/O Standard |
ProASIC3E |
Axcelerator |
ProASIC3 |
RTSX-S |
SX-A |
eX |
CMOS |
|
|
|
X |
|
|
CUSTOM |
|
|
|
X |
X |
X |
GTLP25 |
X |
X |
|
|
|
|
GTLP33 |
X |
|
|
|
|
|
GTL33 |
X |
X |
|
|
|
|
GTL25 |
X |
X |
|
|
|
|
HSTL1 |
X |
X |
|
|
|
|
HSTLII |
X |
|
|
|
|
|
LVCMOS33 |
X |
|
X |
|
|
|
LVCMOS25 |
X |
X |
|
|
|
|
LVCMOS25_50 |
X |
|
X |
|
|
|
LVCMOS18 |
X |
X |
X |
|
|
|
LVCMOS15 |
X |
X |
X |
|
|
|
LVTTL |
X |
X |
X |
X |
X |
|
TTL |
X |
X |
X |
X |
X |
|
PCI |
X |
X |
X |
X |
X |
X |
PCIX |
X |
X |
X |
|
|
|
SSTL2I |
X |
X |
|
|
|
|
SSTL2II |
X |
X |
|
|
|
|
SSTL3I |
X |
X |
|
|
|
|
SSTL3II |
X |
X |
|
|
|
|
Note: The LVDS and LVPECL I/O standards cannot be set through a script.
-iothresh value
Sets the compatible threshold level for inputs and outputs. The default I/O threshold is based upon the I/O standard. You can set the I/O Threshold independently of the I/O specification in the PinEditor tool by selecting CUSTOM in the I/O Standard cell. The following table shows the acceptable values for the supported devices (SX-A, RTSX-S, and eX):
Value |
Description |
CMOS |
RTSX-S devices only. An advanced integrated circuit (IC) manufacturing process technology for logic and memory, characterized by high integration, low cost, low power, and high performance. CMOS logic uses a combination of p-type and n-type metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits found in computers, telecommunications, and signal processing equipment. |
LVTTL |
(Low-Voltage TTL) A general purpose standard (EIA/JESDSA) for 3.3V applications. It uses an LVTTL input buffer and a push-pull output buffer. |
PCI |
A computer bus for attaching peripheral devices to a computer motherboard in a local bus. This standard supports both 33 MHz and 66 MHz PCI bus applications. It uses an LVTTL input buffer and a push-pull output buffer. With the aid of an external resistor, this I/O standard can be 5V-compliant for most families, excluding ProASIC3/E families. |
Note: The -iothresh attribute is also referred to as "Loading" in some families.
-slew value
Sets the output slew rate. Slew control affects only the falling edges. Rising edges are not affected. This attribute is only available for LVTTL, PCI, and PCI outputs. For LVTTL, it can either be high or low. For PCI and PCIX, it can only be set to high. The following table shows the acceptable values for the supported devices (ProASIC3/E, Axcelerator, SX-A, RTSX-S, and eX):
Value |
Description |
high |
Sets the I/O slew to high |
low |
Sets the I/O slew to low |
-res_pull value
Allows you to include a weak resistor for either pull-up or pull-down of the input buffer. The following table shows the acceptable values for the supported devices (ProASIC3/E, Axcelerator, SX-A, RTSX-S, and eX):
Value |
Description |
up |
Includes a weak resistor for pull-up of the input buffer |
down |
Includes a weak resistor for pull-down of the input buffer |
none |
Does not include a weak resistor |
-out_load value
Indicates the output-capacitance value based on the I/O standard selected. This option is not available in ACTgen. This attribute determines what Timer will use as the loading on the output pin and applies only to outputs. You can enter a capacitive load as an integral number of picofarads (pF). The default is 35pF. This attribute is available only for the following devices: ProASIC3/E, Axcelerator, SX-A, RTSX-S, and eX.
None
pin_assign -port usw0 -pin A2
pin_commit
pin_assign -port usw0 -iostd LVTTL -slew low -res_pull down
pin_commit