Types of physical constraints

Designer supports three types of physical constraints:

• I/O assignments

• Location and region assignments

• Clock assignments

I/O Assignments

I/O assignment constraints are physical constraints for setting the pin location and I/O attributes for a specific architecture and device.

You can configure and assign input and output macros and their attributes to pins using I/O Attribute Editor or one of the PinEditor tools or by importing a constraint file.

To manually place and configure your I/Os, use the PinEditor tool. There are two different versions of PinEditor. The version you use depends on which product family you are designing for:

• For ProASIC3E, ProASIC3, ProASIC PLUS, Axcelerator, and ProASIC devices, use PinEditor in MultiView Navigatgor (MVN) . To edit I/O attributes, use the I/O Attribute Editor tool.

You can use the I/O Attribute Editor tool in MVN to view, sort, and edit I/O attributes. Additionally, you can use this tool to lock and unlock pins in your design. PinEditor Standalone has a built-in I/O attribute editor.

Location and Region Assignments

Location and region assignment constraints are physical constraints for setting location and region assignments for a specific architecture and device.

You can create and edit regions on your chip and assign logic to those regions using either one of the GUI tools available for your device family or by importing a constraint file.

Use the ChipPlanner tool in MVN to view the placement and routing for ProASIC3E, ProASIC3, Axcelerator, ProASIC, and ProASICPLUS designs. Use ChipEditor to view and manually change location assignments for other design families.

Clock Assignments

Clock assignments constraints are physical constraints for assigning nets to clocks.

You can assign nets to local clocks using the ChipPlanner tool in MVN. You can also assign nets to local clocks and global clocks (with the exception noted below) by importing a constraint file.

Note: You cannot assign global clocks for Axcelerator.