/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
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/******************************************************************************/
/***************************************************************************
****************************************************************************
***
*** Program File: @(#)bm_decode.v
***
*** Description:
*** Implements the afx byte mark decoding.
***
****************************************************************************
****************************************************************************/
/* The following is the Byte Mask Decoder - from 4 encoded bits, 8 are
generated. These 8 bits are actually reversed for Little Endian format
as explained next. Any data on the AFX bus is always in Big Endian format.
Data in Falcon FIFOs and configuration registers is in Little Endian format.
Translation into Little from Big Endian (AFX to Falcon) and translation
from Big to Little Endian (FALCON to AFX) take place in Falcon by routing.
64 bits of data (to/from DB) are divided into 2 32 bit words, and endian
translation occurs within each of the 2 words after swapping between the
2 words in position. Byte 0 in word 0 (see below), becomes byte 3 in word 1
(from Big Endian point of view, in Little Endian it will seen after the
translation as byte 0 in word 0). The decoding of the Byte Mask bits
for Big Endian mode is as follows:
BM DB[63:56] [55:48] [47:40] [39:32] [31:24] [23:16] [15:8] [7:0] Comment
0000 R/W -- -- -- -- -- -- -- Byte 0
0001 -- R/W -- -- -- -- -- -- Byte 1
0010 -- -- R/W -- -- -- -- -- Byte 2
0011 -- -- -- R/W -- -- -- -- Byte 3
0100 -- -- -- -- R/W -- -- -- Byte 4
0101 -- -- -- -- -- R/W -- -- Byte 5
0110 -- -- -- -- -- -- R/W -- Byte 6
0111 -- -- -- -- -- -- -- R/W Byte 7
1000 R/W R/W -- -- -- -- -- -- Half Word 0
1010 -- -- R/W R/W -- -- -- --
1100 -- -- -- -- R/W R/W -- --
1110 -- -- -- -- -- -- R/W R/W
1001 R/W R/W R/W R/W -- -- -- -- Word 0
1101 -- -- -- -- R/W R/W R/W R/W Word 1
1011 R/W R/W R/W R/W R/W R/W R/W R/W Double Word
1111 -- -- -- -- -- -- -- -- Reserved
Word 0 | Word 1
So if we have the following DW in Big Endian mode: BT0 BT1 BT2 BT3 BT4 BT5 BT6 BT7
After the translation, this word becomes in Little: BT7 BT6 BT5 BT4 BT3 BT2 BT1 BT0
*/
module bm_decode
(
// add to support pci configurations
pci_config_access_busy,
config_wbe,
config_add,
pcim_big_endian,
bm_hold,
byte_mask_lo_l,
byte_mask_hi_l,
pci_config_wadd,
pci_config_radd,
pci_config_wbe_l,
// add to support pci config operations
pci_config_wbe
) ;
// Port Declarations
input pci_config_access_busy
;
input [3:0] config_wbe
;
input [2:0] config_add
;
input pcim_big_endian
;
input [3:0] bm_hold
;
output [3:0] byte_mask_lo_l
;
output [3:0] byte_mask_hi_l
;
output [3:0] pci_config_wbe_l
;
output [3:0] pci_config_wbe
;
output [2:0] pci_config_wadd
;
output [2:0] pci_config_radd
;
wire [2:0] pci_config_wadd;
wire [2:0] pci_config_radd;
wire [7:0] byte_mask
;
wire [3:0] byte_mask_lo_l;
wire [3:0] byte_mask_hi_l;
wire [3:0] pci_config_wbe_l;
wire [3:0] pci_config_wbe;
// little endian byte mark decode
function [7:0] byte_decode ;
input [3:0] bm_hold ;
reg [7:0] byte_mask ;
begin
case (bm_hold)
// byte ////////////////////////////////////////////////////////
4'b0000: begin
byte_mask = 8'b00000001; // For Little Endian
end
4'b0001: begin
byte_mask = 8'b00000010; // For Little Endian
end
4'b0010: begin
byte_mask = 8'b00000100;
end
4'b0011: begin
byte_mask = 8'b00001000; // For Little Endian
end
4'b0100: begin
byte_mask = 8'b00010000; // For Little Endian
end
4'b0101: begin
byte_mask = 8'b00100000; // For Little Endian
end
4'b0110: begin
byte_mask = 8'b01000000; // For Little Endian
end
4'b0111: begin
byte_mask = 8'b10000000; // For Little Endian
end
// half-word ///////////////////////////////////////////////////
4'b1000: begin
byte_mask = 8'b00000011;
end
4'b1010: begin
byte_mask = 8'b00001100;
end
4'b1100: begin
byte_mask = 8'b00110000;
end
4'b1110: begin
byte_mask = 8'b11000000;
end
// word ////////////////////////////////////////////////////////
4'b1001: begin
byte_mask = 8'b00001111;
end
4'b1101: begin
byte_mask = 8'b11110000;
end
// doubleword //////////////////////////////////////////////////
4'b1011: begin
byte_mask = 8'b11111111;
end
// reserved byte mask code! //////////////////////////////////////////
4'b1111: begin
// synopsys translate_off
$display("afx_slave Error: reading from reserved byte mask code = 11111");
// synopsys translate_on
byte_mask = 8'b11111111;
end
endcase
byte_decode = byte_mask ;
end
endfunction
// big endian byte mark decode
/*
function [7:0] big_byte_decode ;
input [3:0] bm_hold ;
reg [7:0] byte_mask ;
begin
case (bm_hold)
// byte ////////////////////////////////////////////////////////
4'b0000: begin
byte_mask = 8'b10000000; // For Big Endian
end
4'b0001: begin
byte_mask = 8'b01000000; // For Big Endian
end
4'b0010: begin
byte_mask = 8'b00100000;
end
4'b0011: begin
byte_mask = 8'b00010000; // For Big Endian
end
4'b0100: begin
byte_mask = 8'b00001000; // For Big Endian
end
4'b0101: begin
byte_mask = 8'b00000100; // For Big Endian
end
4'b0110: begin
byte_mask = 8'b00000010; // For Big Endian
end
4'b0111: begin
byte_mask = 8'b00000001; // For Big Endian
end
// half-word ///////////////////////////////////////////////////
4'b1000: begin
byte_mask = 8'b11000000;
end
4'b1010: begin
byte_mask = 8'b00110000;
end
4'b1100: begin
byte_mask = 8'b00001100;
end
4'b1110: begin
byte_mask = 8'b00000011;
end
// word ////////////////////////////////////////////////////////
4'b1001: begin
byte_mask = 8'b11110000;
end
4'b1101: begin
byte_mask = 8'b00001111;
end
// doubleword //////////////////////////////////////////////////
4'b1011: begin
byte_mask = 8'b11111111;
end
// reserved byte mask code! //////////////////////////////////////////
4'b1111: begin
// synopsys translate_off
$display("afx_slave Error: reading from reserved byte mask code = 11111");
// synopsys translate_on
byte_mask = 8'b11111111;
end
endcase
big_byte_decode = byte_mask ;
end
endfunction
*/
//assign byte_mask = pcim_big_endian ? big_byte_decode (bm_hold) :
// byte_decode(bm_hold) ;
assign byte_mask = byte_decode(bm_hold) ;
assign byte_mask_lo_l = ~byte_mask[3:0];
assign byte_mask_hi_l = ~byte_mask[7:4];
assign pci_config_wadd = pci_config_access_busy ? config_add :
{|byte_mask[7:4] & ~(|byte_mask[3:0]),2'b00};
assign pci_config_radd = pci_config_access_busy ? config_add :
{|byte_mask[7:4] & ~(|byte_mask[3:0]),2'b00};
assign pci_config_wbe_l = pci_config_wadd[2] ? byte_mask_hi_l : byte_mask_lo_l;
assign pci_config_wbe = pci_config_access_busy ? config_wbe : pci_config_wbe_l;
endmodule
This page: |
Created: | Thu Aug 19 12:02:37 1999 |
| From: |
../../../sparc_v8/ssparc/pcic/afx_slave/rtl/bm_decode.v
|