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/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
/*                                                                            */ 
/* The contents of this file are subject to the current version of the Sun    */ 
/* Community Source License, microSPARCII ("the License"). You may not use    */ 
/* this file except in compliance with the License.  You may obtain a copy    */ 
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/* obligations, and limitations governing use of the contents of this file.   */ 
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/* these intellectual property rights may include one or more U.S. patents,   */ 
/* foreign patents, or pending applications.                                  */ 
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/******************************************************************************/ 
/***************************************************************************
****************************************************************************
***
***  Program File:  @(#)column13.v
***
****************************************************************************
****************************************************************************/

//  @(#)column13.v	1.1  4/8/92
//
// **************************************************************
//  column13 -- 14 to 2 compression for column 13.
// **************************************************************

[Up: array col13]
module column13     (
		    sum,		// compressed sum
		    carry,		// compressed carry
		    cout1,		// non-ripple carry-out
		    cout2,		// ripple carry-out
		    cin1,		// non-ripple carry-in
		    cin2,		// ripple carry-in
		    x,			// multiplicand
		    y,			// multiplier
		    pass,		// pass = {0,1}
		    fbs,		// feedback sum
		    fbc			// feedback carry
		    );
	//prop CELLCLASS "MODULE"
	//prop GENERATOR "DataPath"
	//prop TERMPLACE "BIT"

    supply0 GND;
	//prop NETTYPE "GROUND"

    output sum;
	//prop TERMPLACE "BOT"
    output carry;
	//prop TERMPLACE "BOT"
    output [6:0] cout1;
	//prop TERMPLACE "LEFT"
    output [5:0] cout2;
	//prop TERMPLACE "LEFT"
    input  [6:0] cin1;
	//prop TERMPLACE "RIGHT"
    input  [5:0] cin2;
	//prop TERMPLACE "RIGHT"
    input  [27:14] x;
	//prop TERMPLACE "TOP"
    input  [13:0] y;
	//prop TERMPLACE "LEFT"
    input pass;
	//prop TERMPLACE "LEFT"
    input fbs;
	//prop TERMPLACE "BOT"
    input fbc;
	//prop TERMPLACE "BOT"

    wire  [15:0] p;		// partial products
    wire  [6:0] cin1;
    wire  [5:0] cin2;
    wire  [5:0] s;		// internal sum's
    wire  pass;
    wire  fbs;
    wire  fbc;

    pproduct_4 pA (
	    p[3:0],
	    x[27:24],
	    y[3:0]
	    );
	    //prop TERMPLACE "POS=0"
	       
    add4 aA (
	    s[0],
	    cout2[0],
	    cout1[0],
	    p[0],
	    p[1],
	    p[2],
	    p[3],
	    cin1[0]
	    );
	    //prop TERMPLACE "POS=1"

    pproduct_4 pB (
	    p[7:4],
	    x[23:20],
	    y[7:4]
	    );
	    //prop TERMPLACE "POS=2"

    add4 aB (
	    s[1],
	    cout2[1],
	    cout1[1],
	    p[4],
	    p[5],
	    p[6],
	    p[7],
	    cin1[1]
	    );
	    //prop TERMPLACE "POS=3"

    add4 aH (
	    s[2],
	    cout2[2],
	    cout1[2],
	    s[0],
	    s[1],
	    cin2[0],
	    cin2[1],
	    cin1[2]
	    );
	    //prop TERMPLACE "POS=4"

    pproduct_4 pC (
	    p[11:8],
	    x[19:16],
	    y[11:8]
	    );
	    //prop TERMPLACE "POS=5"

    add4 aC (
	    s[3],
	    cout2[3],
	    cout1[3],
	    p[8],
	    p[9],
	    p[10],
	    p[11],
	    cin1[3]
	    );
	    //prop TERMPLACE "POS=6"

    pproduct21 pD (
	    p[15:12],
	    x[15:14],
	    y[13:12],
	    pass,
	    fbs,
	    fbc
	    );
	    //prop TERMPLACE "POS=7"

    add4 aD (
	    s[4],
	    cout2[4],
	    cout1[4],
	    p[12],
	    p[13],
	    p[14],
	    p[15],
	    cin1[4]
	    );
	    //prop TERMPLACE "POS=8"

    add4 aI (
	    s[5],
	    cout2[5],
	    cout1[5],
	    s[3],
	    s[4],
	    cin2[3],
	    cin2[4],
	    cin1[5]
	    );
	    //prop TERMPLACE "POS=9"
 
    add4 aK (
	    sum,
	    carry,
	    cout1[6],
	    s[2],
	    s[5],
	    cin2[2],
	    cin2[5],
	    cin1[6]
	    );
	    //prop TERMPLACE "POS=10"

endmodule
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This page: Created:Thu Aug 19 11:57:41 1999
From: ../../../sparc_v8/ssparc/fpu/fp_fpm/rtl/column13.v

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