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/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
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/***************************************************************************
****************************************************************************
***
***  Program File:  @(#)select.v
***
****************************************************************************
****************************************************************************/

//  @(#)select.v	1.1  4/9/92
//
// **************************************************************
//  select -- logic to select correct mantissa based on the signs.
// **************************************************************

[Up: final_adder select0]
module select (
	       frac_ovf,
	       select,
	       sign_0d,
	       sign_1d,
	       sign_0s,
	       sign_1s,
	       c54_n,
	       c54_v,
	       c54,
	       double_precision
	       );


    output frac_ovf;		// fraction overflow (mantissa >= 2.0)
    output [1:0] select;

    input sign_0d, sign_1d;
    input sign_0s, sign_1s;
    input c54_n, c54_v, c54;
    input double_precision;


				// product_overflow is overflow before rounding
    wire product_overflow = (double_precision) ? (sign_0d | (sign_1d & c54)) :
						 (sign_0s | (sign_1s & c54)) ;

    wire [1:0] select ;

				// select[1] is overflow after rounding
    assign select[1] = (double_precision) ? (sign_0d | (sign_1d & c54_n)) :
					    (sign_0s | (sign_1s & c54_n)) ;

    assign select[0] = (~select[1] & c54_n) | (select[1] & c54_v) ;

    assign frac_ovf = product_overflow | select[1] ;

endmodule
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This page: Created:Thu Aug 19 12:02:32 1999
From: ../../../sparc_v8/ssparc/fpu/fp_fpm/rtl/select.v

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