Answers Database
UNISIMS/SIMPRIMS: Usage of GSR_SIGNAL, GR_SIGNAL, PRLD_SIGNAL, and GTS_SIGNAL text macros in Verilog simulation?
Record #3914
Product Family: Software
Product Line: FPGA Implementation
Product Part: Unisim
Product Version: n/a
Problem Title:
UNISIMS/SIMPRIMS: Usage of GSR_SIGNAL, GR_SIGNAL, PRLD_SIGNAL, and GTS_SIGNAL text macros in
Verilog simulation?
Problem Description:
Urgency: Standard
General Description:
What is the usage of GSR_SIGNAL, GR_SIGNAL, PRLD_SIGNAL, and
GTS_SIGNAL text macros in Verilog simulation?
Solution 1:
In Alliance 1.4 and 1.5i, the general procedure for specifying global signals
for Verilog simulation flow involves defining the global signals with one of the
following text macros: GSR_SIGNAL, GR_SIGNAL, PRLD_SIGNAL, or
GTS_SIGNAL. This is necessary because these global nets do not exist as
external ports in the UNISIM/SIMPRIMS libraries, and as a result, the reset
of the UNISIMS/SIMPRIMS components is controlled by the detection of the
text macros. In addition, you must declare the global signal either as a Verilog
wire or reg. Your choice of wire or reg depends on whether your design
contains a STARTUP component.
The global tri-state signal is defined using the Verilog macro, GTS_SIGNAL.
However, this is not defined in the UNISIM models.
See (Xilinx Solution 5009) on how to drive the global signals.
End of Record #3914 - Last Modified: 09/22/99 14:51 |