Answers Database
M1.5i/2.1i: Timing Report: Minimum Delay Reporting "-s min" for Timing Analyzer, TRCE, and NGDANNO
Record #4506
Product Family: Software
Product Line: Merged Core
Product Part: Timing
Problem Title:
M1.5i/2.1i: Timing Report: Minimum Delay Reporting "-s min" for Timing Analyzer, TRCE, and
NGDANNO
Problem Description:
Urgency: Standard
General Description:
Reporting minimum delays is commonly requested in the area of
clock-to-pad delays in order to guarantee whether the device will
meet a downstream hold time requirement. In M1.5, Timing Analyzer,
TRCE, and NGDANNO all have the ability to report minimum delays
on a design that has been completely routed.
NOTE: Only the XC4000XL supports this feature. Support for other
families will be added in future releases.
Solution 1:
To generate a minimum delay report from within Timing Analyzer
after PAR has completed:
1) Select Options->Speed Grade->min (click OK)
2) Now generate a report (i.e, Analyze->Advanced Design)
3) Verify that the report generated used Speed Grade: -0
In 2.1i, the -min is not working correctly and is fixed in the
latest 2.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates/
Min timing values are available for 4kxl/xla and Virtex.
Solution 2:
To generate a minimum delay Post Layout Timing Report, the
following TRCE option must be specified within the Template Manager:
trce -s min
Verify that the report generated used Speed Grade: -0
For help on how to specify options from within the Template
Manager, please refer to (Xilinx Solution 1227).
Solution 3:
To generate a simulation netlist with minimum delays, the following
NDGANNO option must be specified within the Template Manager:
ngdanno -s min
NOTE: MINIMUM timing delays represent speeds which do not accurately
reflect typical process delays.
For help on how to specify options from within the Template Manager,
please refer to (Xilinx Solution 1227).
End of Record #4506 - Last Modified: 11/24/99 10:45 |
