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NGD2VER 2.1i SP1: - glbl.v has a different 'timescale from .v and .tv output of NGD2VER
Record #7338
Product Family: Software
Product Line: FPGA Implementation
Product Part: ngd2ver
Product Version: 2.1i
Problem Title:
NGD2VER 2.1i SP1: - glbl.v has a different 'timescale from .v and .tv output of NGD2VER
Problem Description:
Urgency: Standard
General Description:
The current glbl.v in 2.1i has the following `timescale:
`timescale 100 ps / 10 ps
However, both .tv and .v file written from ngd2ver has the following `timescale
`timescale 1 ns / 1 ps.
The `timescale can be declared in any file, and the smallest precision of all the
timescale directives determines the time unit of the simulation.
Since `include glbl.v is written into the .tv file after the `timescale of the .tv file,
the `timescale from the glbl module will override the user's `timescale and cause
unexpected simulation duration.
`timescale 1 ns / 1 ps.
`include <path_to_xilinx>/verilog/src/glbl.v
module test ();
...
endmodule
The first timescale indicates that the time units for test are in multiples of 1 ns
and it is precise to 1 ps. Thus, the smallest timestep for the simulator is 1 ps.
The second timescale is 100 ps / 10 ps which is read from glbl.v. Since 10 ps is
greater than 1 ps, the smallest timestep remains 10 ps. However, the new time
unit of 10 ps overrides the previous one of 1 ns, and sets the time unit for
subsequent module definitions. Thus, the `timescale is defined as 10 ps / 1 ps.
Solution 1:
Ngd2ver 2.1i Service Pack 1 correctly writes the `timescale after the
`include in the testfixture template file. However, the glbl.v file still
contains a `timescale of 100ps / 10ps.
For more information about the 2.1i Service Pack 1 Update see:
(Xilinx Solution #7317)
End of Record #7338 - Last Modified: 09/01/99 17:43 |
