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            Virtex™-II Data Sheet
 
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Module 1: pdf (167 KB) Introduction and Ordering Information v1.3  (1/25/01) 

  • Summary of Features
  • General Description
  • Device/Package Combinations and Maximum I/O
  • Ordering Information
Module 2: pdf (664 KB) Detailed Functional Description v1.3   (1/25/01)
  • Detailed Description 
  • Digitally Controlled Impedance (DCI)
  • Configurable Logic Blocks (CLBs)
  • Sum of Products
  • 3-State Buffers
  • 18-Kbit Block SelectRAM Resources
  • 18-Bit x 18-Bit Multipliers
  • Global Clock Multiplexer Buffers
  • Digital Clock Manager (DCM)
  • Active Interconnect Technology
  • Creating a Design
  • Configuration 
  • Power-Down Sequence 
Module 3: pdf (637 KB) DC and Switching Characteristics v1.3  (1/25/01) 
  • Electrical Characteristics
  • Performance Characteristics
  • Switching Characteristics 
  • Pin-to-Pin Output Parameter Guidelines
  • Pin-to-Pin Input Parameter Guidelines
  • DCM Timing Parameters
Module 4: pdf (4.76 MB) Pinout Tables v1.4  (2/7/01)
  • Pin Definitions
  • Pinout Tables
    • CS144 Chip-Scale BGA Package
    • FG256 Fine-Pitch BGA Package
    • FG456 Fine-Pitch BGA Package
    • FG676 Fine-Pitch BGA Package
    • BG575 Standard BGA Package
    • BG728 Standard BGA Package
    • FF896 Flip-Chip Fine-Pitch BGA Package
    • FF1152 Flip-Chip Fine-Pitch BGA Package
    • FF1517 Flip-Chip Fine-Pitch BGA Package
    • BF957 Flip-Chip BGA Package
Xilinx Data Book
Virtex-II Product Information


 
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