Maximum Board Space Savings
Since chip scale packages are about 1/3 the size of traditional PLCC and QFP packages, Xilinx CSPs allow for the same density to fit into 1/3 the original space. This poses significant benefits
to portable end products or any system design where board space is a premium.
Easy & Cost Effective Manufacturing
In addition to board space savings, chip scale packages simplify and streamline the manufacturing process by eliminating many of the requirements for handling and lead coplanarity since
there are no fragile leads to bend. Also, since the device signal I/Os are located at the edge of the package, less PCB layers are required to route the design (see diagram below for example). These combined benefits help to reduce overall
manufacturing cost.
Broad Product Offering
Chip Scale Package solutions from Xilinx offer a whole new dimension in board space savings and flexibility. The easy-to-handle CSP fits more density into less space.
The XC9500XL/XV and CoolRunner XPLA3 CPLD families offer a full line of 0.8-mm ball pitch CSPs , including 48-, 144- and 280-ball configurations. The CoolRunner XPLA3 family also offers an
even smaller 0.5-mm pitch CSP featuring 56-balls.
48-ball CSP
(0.8-mm pitch) |
56-ball CSP
(0.5-mm pitch) |
144-ball CSP
(0.8-mm pitch) |
280-ball CSP
(0.8-mm pitch) |
XC9536
XC9536XL
XC9572XL
XCR3032XL
XCR3064XL
|
XCR3064XL |
XC95144XL
XCR3128XL
|
XC95288XL
XCR3256XL
XCR3384XL |
Xilinx package designations:
0.5mm = CP
0.8mm = CS
|
Click here for more information about Xilinx
CPLD Products. |