View From The Top
	Cover Story
	CoolRunner CPLDs
	Virtex
	Software
	Cores
	Support Products
	Applications
	Success Stories
	Columns/Reference

If you would like a subscription to the Xcell journal, use the literature request form.  If you have comments, suggestions, or would like your design featured in Xcell, e-mail editor@xilinx.com. 

In this Q2 '00 issue... 

 From the Editor: The Future of Logic Design 204KB

View from the Top
 The Promise of Field Upgradable Systems 159KB

Cover Story
 Creating Field Upgradable Hardware Systems 384KB

CoolRunner CPLDs
 Fast Zero Power (FZP) Technology 253KB
 XPLA3 Development Kit 277KB
Implementing a 16B/20B Encoder/Decoder in a CoolRunner CPLD 290KB

Virtex
 New Virtex-EM FPGAs Over 1 Mbits of RAM 226KB

Software
 Xilinx Development Systems 390KB
 On-chip, Real-time Logic Analysis 301KB
 JTAG Programmer 273KB
 Archetectural Synthesis from Behavioral C Code 277KB

Cores
 Data Encryption Cores 250KB
 Image Compression Cores 232KB
 Using a 8051 Core and QPRO 310KB

Support Products
 A High Speed Platform for Dynamically Reconfigurable Logic 241KB
 New PCI 64/66 Design Kit 321KB
 Mass Storage for Xilinx FPGA 315KB

Applications
 Using the Virtex Look Up Tables 352KB
 Efficient Debugging Using PROBE 272KB
 Control Virtex Design Optimization 339KB

Success Stories
 A New Internet Protocol Service Switch Uses FPGAs 268KB
 FPGAs for a Reconfigurable Image Processing Module 301KB

Columns/Reference
 Electronic Distribution 240KB
 Trade Shows 229KB
 Customer Education 225KB
 Virtex Reference Guide 174KB
 Spartan Reference Guide 145KB
 CPLD Reference Guide 191KB
 QPRO Reference Guide 187KB
 PROM Reference Guide 141KB
 Configuration Solutions 144KB