| Title |
Version |
Size |
Reference Design |
 XAPP235:
Virtex-E Package Compatibility Guide |
1.1 |
29K |
|
XAPP234:
Virtex SelectLink
Communications Channel |
1.0 |
88K |
|
| XAPP233:
Multi-channel 622 MHz LVDS Data Transfer with Virtex-E Devices |
1.0 |
331K |
|
| XAPP232:
Virtex-E LVDS Drivers and Receivers: Interface Guidelines |
1.0 |
175K |
|
| XAPP231:
Multi-Drop LVDS with Virtex-E FPGAs |
1.0 |
83K |
|
| XAPP230:
The LVDS I/O Standard |
1.1 |
69K |
|
| XAPP211:
PN Generators Using the Virtex SRL Macro |
1.0 |
64K |
PC:
VHDL & Verilog
UNIX:
VHDL & Verilog
|
| XAPP210:
Linear Feedback Shift Registers in Virtex Devices |
1.0 |
54K |
|
| XAPP208:
IDCT implementation in Virtex Devices for MPEG applications |
1.1 |
45K |
PC:
Verilog
UNIX:
Verilog
|
| XAPP205:
Data-Width Conversion FIFOs using Virtex Block SelectRAM Memory |
1.1 |
41K |
PC:Verilog |
| XAPP204:
CAM in Block Select RAM |
1.1 |
102K |
PC:
VHDL & Verilog
UNIX:
VHDL & Verilog
|
| XAPP203:
Designing Flexible, Fast CAMs with Virtex Slices |
1.1 |
75K |
PC:
VHDL & Verilog
UNIX:
VHDL & Verilog
|
| XAPP202:
CAM in ATM applications |
1.1 |
68K |
PC:VHDL
UNIX:
VHDL |
| XAPP201:
An Overview of Multiple CAM Designs in Virtex Devices |
1.1 |
46K
|
|
| XAPP200:
Double Data Rate SDRAM |
2.1 |
102K |
PC:
64-bit
PC:
16-bit
UNIX:
64-bit
UNIX:
16-bit
|
| XAPP158:
Powering Virtex FPGAs |
1.1 |
34K |
|
| XAPP155:
Virtex Analog to Digital Converter |
1.1 |
47K |
|
| XAPP154:
Virtex Synthesizable Delta-Sigma DAC |
1.1 |
52K |
|
| XAPP153:
Status and Control Semaphore Registers Using Partial Reconfiguration |
1.0 |
180K |
PC:Verilog |
| XAPP152:
Virtex Power Estimator User Guide |
1.0 |
49K |
|
| XAPP151:
Virtex Configuration Architecture Advanced Users Guide |
1.2 |
175K |
|
| XAPP139:
Virtex Configuration and Readback through Boundary Scan |
1.1 |
88K |
|
| XAPP138:
Virtex Configuration and Readback |
1.2 |
183K |
|
| XAPP137:
Configuring Virtex FPGAs from Parallel EPROMs with a CPLD |
1.0 |
94K |
PC:VHDL
& Verilog |
| XAPP136:
Synthesizable 200 MHz ZBT SRAM Interface |
2.0 |
44K
|
PC:VHDL
PC:Verilog |
| XAPP135:
Virtex I/V Curves for Various Output Options |
1.0 |
26K
|
|
| XAPP134:
Virtex Synthesizable High Performance SDRAM Controller |
3.0 |
105K |
PC:VHDL
PC:Verilog
UNIX:VHDL
UNIX:Verilog
|
| XAPP133:
Using the Virtex SelectI/O |
2.1 |
220K
|
|
| XAPP132:
Using the Virtex Delay-Locked Loop |
2.0 |
87K
|
PC:VHDL
& Verilog |
| XAPP131:
170MHz Synchronous and Asynchronous FIFOs Using the Virtex Block SelectRAM+ |
1.3 |
311K
|
PC:VHDL
& Verilog
UNIX:VHDL
& Verilog
|
| XAPP130:
Using the Virtex Block SelectRAM+ |
1.2 |
64K
|
|
Application
Notes
to view the 
