XC3000

Title	Size
XAPP004: Loadable Binary Counters	40 KB
XAPP005: Register Based FIFO	50 KB
XAPP007: Boundary Scan Emulator for XC3000	80 KB
XAPP009: Harmonic Frequency Synthesizer and FSK Modulator	20 KB
XAPP011: LCA Speed Estimation: Asking the Right Question	10 KB
XAPP012: Quadrature Phase Detector	20 KB
XAPP014: Ultra Fast Synchronous Counters	30 KB
XAPP022: Adders, Subtracters and Accumulators in XC3000	60 KB
XAPP026: Multiplexers and Barrel Shifters in XC3000/XC3100	40 KB
XAPP027: Implementing State Machines in LCA Devices	30 KB
XAPP029: Serial Code Conversion Between BCD and Binary	20 KB
XAPP030: Megabit FIFO in Two Chips: One LCA Device and One DRAM	20 KB
C-Cube CL550 and Xilinx XC3020A ISA-Based Motion-JPEG Codec	100 KB
XAPP091: Configuring Mixed FPGA Daisy Chains	20 KB
XAPP061: Design Migration from XC2000/XC3000 to XC5200	70 KB
XAPP024: XC3000 Series Technical Information	110 KB

Title	Size
XC3000 Series Field Programmable Gate Arrays v3.1, 11/98	730 KB

Title	Issue
Voice Technologies Group Creates Adaptable Network Interface	Q3 '99
XC3195 FPGAs: Getting a "Handel" on High Energy Physics	Q2 '98
Demultiplexing 200 MHz Data Streams	Q1 '97
Ten Digit Fully Synchronous BCD Counter Runs at 87 MHz	Q2 '96
Manchester Decoder in 3 CLBs	Q2 '95