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Xilinx CPLD WebPOWERED
Software Solutions
To enhance CPLD designer productivity, Xilinx offers two FREE, leading edge, Web enabled software products: 
Learn more about WebFITTER Xilinx WebFITTER is a FREE on-line design and evaluation tool. This industry-first, interactive environment gives you the ability to target any Xilinx CPLD device, whether it's our high speed, low cost XC9500 family or our ultra-low power CoolRunner Series. You obtain all of the necessary information: resource and timing reports, HDL timing and programming files as well as instant pricing, all within minutes! 
Xilinx also offers a full suite of EDA design, fitting, and programming tools for the desktop. WebPACK is a collection of FREE downloadable modules that provides you the best quality of results and flexibility for either the XC9500 Series or CoolRunner Series of Xilinx CPLDs.  Learn more about WebPACK
Whether your design flow includes EDA tools like Synopsys, Synplicity, or Exemplar, or you need a complete design environment that includes ABEL and HDL synthesis, fitting technology, and programming software, WebPACK gives you the most flexibility. Because WebPACK is offered in small, single file modules that you install from the Web, you can quickly and reliably run the software within minutes.

Xilinx CPLD WebFITTER
WebFITTER
Xilinx CPLD WebFITTER has broken new ground in evaluating on-line silicon solution. By simply selecting the design file and clicking the ‘GO’ button, you are moments away from the industry's best CPLD solution. Whether it's performance, cost, or ease-of-use, the WebFITTER has it all.

WebFITTER Features
  • Supports all Xilinx CPLD families
    • XC9500/XL/XV high speed and low cost series 
    • Xilinx CoolRunner XPLA/XPLA2/XPLA3 ultra-low power series.
  • Accepts the following design formats 
    • VHDL, Verilog, ABEL, EDIF, XNF
    • Competitive conversions for Altera (TDF & TDO) and Vantis (NSR) formats

To use WebFITTER, you follow the three steps illustrated below. 
Step 1: Select Input Design File(s)

Step 2: You select your targeted device by density, package, speed, voltage, or by automatic device selection. 
 

Step 3: Submit your design by clicking Green Go  button. When your design is finished, you receive an e-mail containing a specific URL that links you to the results! 
 
Step2: Select Target Family/Device
 

WebFITTER provides
  • Links to fitting, timing, and log files
  • Targeted device datasheets
  • On-line XC9500 and CoolRunner Series price quotes
  • Simulation and device programming files
  • On-line tutorials
  • Complete on-line Help 
Take me to the WebFITTER page

Xilinx CPLD WebPACK
WebPACK
The Xilinx CPLD WebPACK contains FREE downloadable software modules for both the XC9500 and CoolRunner series CPLDs. Each modules provides a simple and intuitive design environment for your target Xilinx CPLD family. The CPLD WebPACK is a suite of EDA design tools that you can download and use individually, or install together for an integrated design environment for the XC9500 Series, CoolRunner Series, or both. 

The downloadable software modules include the following:
  

HDL - ABEL Synthesis Tools For designers that do not currently have EDA design entry tools, Xilinx is pleased to offer the HDL - ABEL Synthesis Tools module; a complete design entry system that includes Xilinx Synthesis Technology (XST) for VHDL and Verilog languages as well as the latest version of ABEL v7.2 synthesis engines.
After you download and install this module, the Xilinx Project Navigator will detect if any other WebPACK modules are installed. Once installed, WebPACK modules will provide complete design implementation control from within a single project window.
 
Project Navigator Interface for CoolRunner When you use XST (Xilinx Synthesis Technology) coupled with the industry's most widely used project navigation system and the latest version of ABEL (v7.2), you have the most up-to-date integrated, PC-based, CPLD design environment.
The Project Navigator can compile ABEL, VHDL, or Verilog source files. Project Navigator for 9500 Series CPLD
HDL-ABEL Text Editor You can simulate ABEL vectors and link HDL test benches to third party HDL simulation tools, like Model Technology's ModelSim. Once compiled, you can seamlessly process the netlist through the Xilinx CPLD implementation tools. The implementation tools will create the necessary JEDEC file, and the Project Navigator will invoke the JTAG Programmer to program the device and perform JTAG ‘INTEST’ verification using the same ABEL vectors from your design.

Device Fitter Tools The Device Fitter Tools section consists of two downloadable modules: the XC9500 Fitter Tools and the CoolRunner Fitter Tools. Either or both of these modules can be installed into the WebPACK design environment.
If you currently own a design entry tool such as a third party synthesis or schematic capture package, the XC9500 Device Fitter Tools module provides all the device fitting and verification tools you need to fit your design into any of the Xilinx XC9500 Series CPLDs.The XC9500 Device Fitter Tools module is identical to the Alliance Series v2.1i software currently available from Xilinx, except that it is specific to the XC9500 CPLD families. This FREE downloadable module will accept either EDIF or XNF netlists and provide you with a JEDEC programming file and timing simulation netlist.


Constraints Editor Interface
Constraints Editor Interface
LogiBLOX Module Selector Interface
LogiBLOX Module Selector Interface
 
Included Features 
  • Push-button implementation flows
  • Timing driven fitting technology 
  • Fitting and timing reports
  • Internet enabled on-line Help 
  • LogiBLOX module synthesis
  • Xilinx Constraints Editor 
  • Interactive Timing Analyzer 
Timing Report 
HDL - ABEL Report Viewer
 
CPLD ChipViewer
CPLD ChipViewer Interface
 The CPLD ChipViewer (a JavaTM utility) graphically represents pin constraints and assignments. You can also use this tool to graphically view a design implementation from the chip boundary to the individual macrocell equations.

Device Programming Tools The Device Programming Tools section contains two specific software programming modules: 
JTAG Programmer (XC9500, FPGA, and PROM)
XPLA PC-ISP3 Programmer (XPLA, XPLA2, and XPLA3).

The JTAG Programmer software contains all the software you need to perform IEEE 1149.1 JTAG operations for the Xilinx XC9500 series CPLDs, Xilinx FPGAs, and Xilinx PROM devices that support JTAG configuration. You can run JTAG Programmer as a stand-alone programming tool or invoke it from within either the WebPACK Project Navigator (HDL-ABEL Synthesis Tools module) or from within the Xilinx Design Manager (XC9500 Device Fitter Tools module). Even if you are not a CPLD designer, the Device Programming Tools module allows you to get the latest updates for FPGA device programming!
 
JTAG Programmer Interface


The XPLA PC-ISP3 Programmer v4.07 contains the latest ISP device programming software for Xilinx CoolRunner CPLDs, including the new XPLA3 family. 
 
Included Features
  • Non-CoolRunner CPLD support 
  • ATE automatic vector generation including SVF
  • Automatic programming cable detection for the following download cables:
    • CoolRunner 
    • Xilinx JTAG 
    • Altera Byte-Blaster 
XPLA PC-ISP3 Programmer
Take me to the WebPACK page