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"The clock frequency of the SDRAM interface is our major
bottleneck in providing higher bandwidth," said Aptitude Vice President
and Chief Technical Officer Russell Dietz.
"We plan to double the clock frequency on the SDRAM interface
to 125 MHz by using Virtex delay lock loops to de-skew the FPGA
clock and the SDRAM clock. Another advantage Xilinx Virtex
FPGAs offer is their seamless fit into our current ASIC software
flow."
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Apptitude is a pioneer in the
applications performance management market, providing application-aware
networking solutions. Apptitude's unique solution allows customers to
understand who is using which business applicationas and the impact to
the netowrk. With application usage as a business metric, IT customers
can meet service level agreements (SLAs), implement billing, and charge
back or improve netowrk capacity planning.
Apptitude's goal is to ensure customers' network investments consistently
deliver maximum value for their users and business aplications. Founded
in 1995, the company was originally named Technically Elite.
Apptitude is privately owned with promary venture funding from AVI Management
Partners, corporate investments from Siemens Corporation and professional
investment from ASCII Corporation and Itochu Techno Science. For more
information visit the Apptitude website at www.apptitude.com.
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