Answers Database
COREGEN, DSP, WEBLINX: DSP brochure on WebLINX indicates that Xilinx supports Sine/Cosine/Arctan LUTs of any width and table depth.
Record #4504
Product Family: Software
Product Line: Coregen
Product Part: Coregen
Product Version: c1_5
Problem Title:
COREGEN, DSP, WEBLINX: DSP brochure on WebLINX indicates that Xilinx supports
Sine/Cosine/Arctan LUTs of any width and table depth.
Problem Description:
Urgency: standard
General Description:
The table on p.7 of the DSP brochure on WebLINX indicates that
Xilinx supports Sine/Cosine/Arctan LUTs of any bit width and
table depth.
The brochure in question is located at:
http://www.xilinx.com/products/logicore/docs/dsp/dspbroch.pdf
Solution 1:
This entry in the table is incorrect, based on the cores
we currently supply:
1. There is a limit of 10 bits on input bit width when
using the CORE Generator to generate this function.
2. Table depth is *not* unlimited when using the
CORE Generator to generate this function.
3. We are not currently shipping an Arctan Look-up Table
module.
End of Record #4504 - Last Modified: 08/27/98 23:15 |
