ModelSim XE - I Projects

Software & Version:
N/A

Audience
Xilinx users wishing to perform HDL behavioral simulation.

Prerequisites
Students should have a basic knowledge of VHDL and/or Verilog as well as a basic understanding of the concepts of simulation.

What is the level of the material?
Level I - Beginning

Training Duration
1 hour

Content Description
An overview of using the HDL behavioral simulator - ModelSim Xilinx Edition (XE). There is a discussion of the primary reasons for performing behavioral simulation in an HDL design. Overview of simulation steps in ModelSim - including, creating ModelSim projects, use of libraries in simulation, creating and managing libraries, compilation steps, compiling source code, loading a top-level design, adding signals to waveform viewer, debugging, setting breakpoints, and simulating. This section takes the student completely through creating a ModelSim Project, using libraries - what they are and how they are used and compiling HDL source files. The remaining steps are covered in ModelSim module 2 - Simulation.

Objectives
After completing this training, student will be able to:

• List advantages of using behavioral simulation in an HDL design
• Define simulation steps
• Define the difference between ModelSim PE and XE
• Define a ModelSim Project
• Apply Libraries to their use in simulation
• Define steps for compiling HDL source files

Topics or Training Outline

• Introduction
• Create a ModelSim Project
• Introduction to Libraries
• Creating & Mapping Libraries
• Compiling Source Code
• Summary

Teaching Activities

Structured Discussion X
Paper exercise(s)
Lab exercise(s)
Demo
Review questions X
Test

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