The Configuration Problem Solver

Does the D/P Pin transition to a logic HIGH?

    Yes, the D/P goes high.
    No, the D/P does not go high.

    The D/P pin is an open drain output that must be pulled high. The FPGA does have an internal pullup that may be dissabled by software options during bitstream generation. An external pullup of 4.7Kohm is recommended. If the D/P pin is connected to other device drivers on the board, then consider disconnecting the pin to verify it's state.

HISTORY
Family: XC3000
Mode: Master Parallel