The Configuration Problem Solver

Has the INIT Pin gone low?

    Yes, the INIT pin is low.
    No, the INIT pin remains high.

    Given that the D/P pin has not gone high, the FPGA has not successfully finished the configuration process. While the INIT pin will temporarily transition low as a result of the Power On Reset (POR) during Power-up or cycling the RESET Pin during configuration or the D/P pin after configuration, the INIT pin should transition high before the configuration process may begin and remain high throughout the configuration process. If the INIT pin transitions low during the configuration process this signals that there is an error in the configuration data.

HISTORY
Family: XC3000
Mode: Master Parallel
D/P: LOW