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Xilinx at Work - "Reed-Solomon"

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Xilinx Solution Summary

The 'Information Age' has given rise to a phenomenal amount of digital data transfer requests over many types of mediums, such as the Internet, LANS, WANS, Cable Modems, xDSL etc. In an ideal situation, data transfer would occur without errors. Unfortunately, in the real world,  errors exist in abundance. Reed-Solomon is the most commonly used methodology of coding and decoding data to eliminate errors during data transfer.

Using Spartan-II FPGAs, the Xilinx Reed-Solomon LogiCORE provides a highly flexible, high performance, low cost solution. The Reed-Solomon cores are parameterizable LogiCOREs that can be configured to support either predefined decoding standards such as ATSC, IES-308 and DVB or the cores can be configured to support custom decoding schemes. 

The Xilinx Reed-Solomon combined with the Spartan-II FPGA family offers a solution that is significantly more cost effective than equivalent ASSPs. The table below shows the features and cost of a Spartan-II Reed-Solomon solution compared with equivalent ASSPs (Application Specific Standard Products). 

The Reed-Solomon cores are available for configuration and download from the Internet. The cores can be configured as either an encoder or a decoder. Try the demo versions of the encoder core or a demo version of the decoder core.




More Information
Reed-Solomon Documentation Reed-Solomon Glossary
Encoder Core Configuration Demo Reed-Solomon FAQ's
Decoder Core Configuration Demo Purchase & Registration Information
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