The Configuration Problem Solver

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Can the 40 bit Header be observed on the DOUT Pin?

Yes, the Header shows up on DOUT. No, the DOUT does not transition.

The Header is the first 40 bits of the bitstream. This contains the Preamble, the LengthCount, and some fill bits. The header is passed along to the DOUT Pin of the FPGA with a 1.5 clock cycle delay to be used by daisy-chained FPGAs if any are present. This can be used to determine if the FPGA has recognized the configuration process. If the Header is not observed then the FPGA has not begun the configuration process. After the header is transmitted through the DOUT the DOUT will remain high while the remainder of the configuration data for this FPGA is loaded.