The Configuration Problem Solver

The DIN Pin is not connected to the board correctly.

    Probe the DIN Pin directly at the FPGA package pin. Verify that the configuration data is reaching the FPGA's pin. Probing a trace or the data source is not proof positive that the data is reaching the FPGA.

HISTORY
Family: XC3000
Mode: Slave Serial
D/P: LOW
INIT: HIGH
LDC: LOW
DOUT: NO