FOR IMMEDIATE RELEASE
XILINX AND XENTEC ANNOUNCE IMAGE COMPRESSION CORES
FOR VIRTEX-E AND SPARTAN-II FPGAS
New cores target JPEG, MPEG, DSP, and image processing applications
SAN JOSE, Calif., February 28, 2000__Xilinx
Inc., (NASDAQ: XLNX) and Xentec,
Inc. of Ontario, Canada, today announced the immediate availability of
new AllianceCORE™
products for use in Xilinx Virtex™-E
and Spartan™-II FPGAs.
The cores include a discrete/inverse discrete cosine transform (DCT and
IDCT) and a JPEG codec. The DCT/IDCT core supports Virtex, Virtex-E, and
Spartan-II devices while the JPEG codec supports Virtex and Virtex-E devices.
Target applications for the new cores include image storage, data and video
compression, medical imaging, and industrial systems. The DCT/IDCT core
is a critical building block in Dolby AC2 and AC3, JPEG, and MPEG compression
systems.
“Xentec developed very compact image compression cores by using the
versatile DSP features in Spartan-II and Virtex architectures,” said Mark
Bowlby, manager of the Xilinx AllianceCORE program. “The JPEG and DCT/IDCT
cores are key enabling functions of image applications in Xilinx FPGAs
that range from digital cameras and video editing to satellite imaging
and surveillance.”
The DCT/IDCT core enables high-speed hardware implementation of the
forward and inverse discrete cosine transform functions in a low cost Spartan-II
device. The JPEG codec on the other hand, provides a fully integrated
encoder-decoder pair used in image compression and decompression applications
in a single Virtex series device.
DCT and IDCT Solution in a $10 Programmable Device
DCT and IDCT (Inverse DCT) functions are the building blocks of JPEG,
MPEG, and ITU-T H261 standards-based codecs that are used in many image
processing applications. A DCT function is a key element in a compression
system that splits still-image pixels into smaller data blocks. It calculates
a value to represent each block that can be used to reduce the storage
space required for the overall image. The IDCT function operates in reverse
and reconstructs the image from compressed data.
Xentec’s DCT/IDCT core performs both DCT and IDCT functions and is ideally
suited for systems that require both image compression and decompression.
It supports both DCT and IDCT on 8x8 image pixel data. DCT or IDCT mode
is selected by means of a control signal. The core fits in a single XC2S100
Spartan-II FPGA that costs $10 in high volume.
“Digital imaging applications typically need the power of 32-bit processors
for implementing the computationally intensive DCT/IDCT functions in software,”
said Robert Bielby, Xilinx director of strategic applications. “By moving
the DCT/IDCT function into a cost-effective Spartan-II device, designers
can now use cheaper eight-bit microcontrollers and cut down the overall
system costs.”
Integrated JPEG Codec Solution
JPEG is an image compression technique for reducing image file sizes
without a noticeable difference in image quality. The Xentec X_JPEG codec
core conforms to the ISO/IEC 10918-1 JPEG baseline specification and performs
both compression and decompression functions. The full-featured core includes
support for stalling and the ability to handle four-color components. It
is extremely flexible, including four programmable quantization and four
programmable Huffman tables that allow the user to specify quantization,
Huffman table and the quantity of pixel blocks assigned for each color
component.
“The memory hierarchy in the Xilinx Virtex-E FPGAs enabled us to develop
an extremely small JPEG core,” said Xerxes Wania, President and CEO of
Xentec. “We used distributed SelectRAM™ to build ROM-based Huffman
tables that are distributed across the design and embedded block SelectRAM
for the large DCT/IDCT, quantization, and zig-zag coding tables. The end
result is a flexible, optimized codec solution that includes both logic
and memory in a single medium-density FPGA.”
Spartan-II FPGAs
The Spartan-II family
delivers 100,000 system gates for under $10 at speeds of 200 MHz and beyond,
offering unmatched design flexibility. These low-power 2.5-volt devices
feature I/Os that operate at 3.3 volts with full 5-volt tolerance. Spartan-II
devices also feature multiple delay locked loops (DLLs), on-chip RAM (block
and distributed), and the versatility of SelectI/O™ technology supporting
over 16 high-performance interface standards. All these features in a device
that offers unlimited programmability and can be upgraded in the field.
Virtex-E FPGAs
The Virtex-E family has made significant
improvements in the areas of capacity and performance over the original
Virtex series: 3.2 million gates; 832 Kbits of True Dual-Port? internal
block RAM; eight digital delay locked loops (DLLs) capable of over 300
MHz clock frequency for system timing; and three new differential signal
standards. The Virtex-E FPGAs are the first programmable logic devices
delivered on 0.18-micron process technology, which Xilinx jointly produced
with Taiwan's UMC Group. The improved process directly contributes to the
30 percent performance gain for all internal functionality. Also, the Virtex-E
family represents the industry's first programmable logic architecture
with 210 million transistors on a single device.
Availability and Pricing
X_JPEG and X_DCT_IDCT cores are immediately available for use in Xilinx
FPGAs from Xentec, Inc. The DCT and IDCT core is available for use
in Spartan-II, Virtex-E, and Virtex FPGAs, and lists at $10,000 for the
netlist version. The JPEG codec is available for use in Virtex-E
and Virtex FPGAs, and lists at $30,000 for the netlist version. All
Xentec products can be purchased directly from Xentec. The datasheets
can be downloaded from the Xilinx IP Center (www.xilinx.com/ipcenter),
a comprehensive resource for system-level intellectual property and services.
About Xentec
Xentec, Inc. provides comprehensive ASIC and FPGA design services,
integration expertise, and technology for the product development requirements
of the world's leading electronics companies. Founded in 1995, Xentec's
mission is to be the leading provider of analog/digital integrated circuit
design services and Intellectual Property used in System-on-Chip (SoC)
based integrated circuits for all facets of the electronics industry. The
company is headquartered in Oakville, Ontario and is privately funded.
More information about the company, its products, and services may be obtained
from the World Wide Web at www.xentec-inc.com.
For inquiries regarding Xentec cores and services please contact sales@xentec-inc.com.
About Xilinx
Xilinx is the leading innovator of complete programmable logic solutions,
including advanced integrated circuits, software design tools, predefined
system functions delivered as cores, and
unparalleled field engineering support. Founded in 1984 and headquartered
in San Jose, Calif.,
Xilinx invented the field programmable gate array (FPGA) and fulfills
more than half of the world
demand for these devices today. Xilinx solutions enable customers to
reduce significantly the time
required to develop products for the computer, peripheral, telecommunications,
networking,
industrial control, instrumentation, high-reliability/military, and
consumer markets. For more
information, visit the Xilinx website at www.xilinx.com.
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Xilinx is a registered trademark, and AllianceCORE and Virtex
are trademarks of Xilinx, Inc. Other brands or product names are trademarks
or registered trademarks of their respective owners.
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