9500 Family Implementation Tools: 2.1i Top Solutions  

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Top 2.1i Solutions

• Solution 2860:Understanding the CPLD Fitter Report 
• Solution 3404: 1.5i/2.1i CPLD : How to use the programmable grounds option for unused pins in 9500/XL devices
• Solution 5999:2.1i CPLD Fitter: Global Offset in 9500 is ignored 
• Solution 7457:2.1i 9500/XL Hitop : "Warning NL_PRIMPIN has no net name. The pin is ignored."
• Solution 2339: M1.5i/2.1i: CPLD: Tig timing constraints
• Solution 6683: 2.1i 9500XL Hitop - Fitting Report shows VCCIO pins as TIE on XC95288XL-BG256
• Solution 8109: 2.1i 9500/XL TAEngine: Program Abnormally Terminated
• Solution 7314: 2.1i 9500/XL Incorrect Implementation of <signal>=VCC
• Solution 8095: 2.1i 9500/XL Hitop: Design that fit in 1.5x does not fit in 2.1i
• Solution 8258: 2.1i : 9500/XL Hitop: WARNING : CPLDFitter - The property SLOW set on the instance "<inst>" conflicts with the previous setting FAST