Subject: RE: When is Cycle Stamp 0?
From: Bojsen, Per (bojsen@zaiqtech.com)
Date: Fri Feb 27 2004 - 08:58:32 PST
Hi John,
> Right now we're starting it after ureset.
I believe we are doing the same (have to check again
though).
> Is there a reason you can see to do otherwise ?
No, not really, I just wanted to confirm my understanding.
My understanding has been proven wrong before which is why
I am extra cautious :-)
> I do agree that we should be specific about this for
> consistency among implementations.
Agreed.
So, as you understand the standard, the cycle stamp should
be 0 while ureset is asserted and it should become 1 at the
first 1/1 cclock rising edge after ureset is deasserted?
Per
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