"fastest cclock" definition

From: Stickley, John <john_stickley@mentorg.com>
Date: Fri Jan 21 2005 - 10:34:59 PST

Brian,

Here's the glossary addition that I promised:

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"fastest cclock" - The fastest cclock in a system is defined to be
one with a ratio of 1/1 and with a don't care duty cycle (see section 5.2.4).
All other controlled clocks are expressed as ratios to the fastest cclock. For
example a 4/1 controlled cclock is interpreted as "for every 4 edges of
the fastest 1/1 clock, there will be one edge of this 4/1 cclock".
The fastest clock will always exist whether explicitly defined via
instantiation of a SceMiClockPort or implicitly.
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In addition I have some suggested re-wording of the text in section
5.2.4 after Figure 12 through to where 5.2.4.1 begins:

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All of the clock parameters have default values.
In simpler systems where only one controlled clock is needed, exactly one
instance of a SceMiClockPort can be instantiated at the top level with no
parameters specified. This results in a single controlled clock with a ratio of
1/1, a don’t care duty cycle (see 5.2.4.3), and a phase shift of 0. Such a clock
is defined to be the "fastest cclock" in the system (see glossary). Depending on
implementation, the fastest cclock can potentially have a frequency matching
that of the uclock on cycles during which it is enabled.

The SCE-MI infrastructure always implicitly creates a fastest cclock with a 1/1
ratio. Whether or not it is visible to the user’s design depends on whether a
SceMiClockPort with a 1/1 ratio is explicitly declared (instantiated).

If the user instantiates a 1/1 cclock with without a don't care duty cycle, then
that becomes the fastest clock in the system, although it limits performance
to be only half as fast as the uclock, since in this case, both edges must be
scheduled on posedges of uclock.

The fastest cclock is also the basis for cycle stamping (see section 5.4.5.3 of
scemi-108.pdf). The cyclestamp will always be the number of fastest cclock
cycles since reset.

In more complex systems that require multiple clocks ...

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-- johnS

______________________________/\/ \ \
John Stickley \ \ \
Principal Engineer \ \________________
Mentor Graphics - MED \_
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Received on Fri Jan 21 10:37:34 2005

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